Вектор-06ц в ПЛИС / Vector-06c in FPGA
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Oct 22, 2024 - Verilog
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altera-cyclone
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透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。
fpga digital vhdl verilog learn xilinx digital-logic systemverilog hdl verilog-hdl xilinx-fpga xilinx-vivado digital-logic-design altera-fpga altera-cyclone-v-sockit altera-cyclone-iii-de0 altera-quartus soc-kit altera-cyclone vhdl-verilog
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Oct 25, 2023 - Verilog
Verilog code developed for the Altera Cyclone II EP2C5
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Feb 5, 2025 - Verilog
A segmented processor implemented in SystemVerilog for the class Computer Architecture, capable of outputting instructions and memory through VGA in the Intel Altera FPGA Cyclone V Intel DE0-CV
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Nov 9, 2026 - SystemVerilog
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