This repository contains the implementation of an Image-to-Netlist Conversion pipeline. The tool extracts circuit layouts from image representations and generates a corresponding netlist. This is a proof of concept that can be improved and implemented in circuit analysis softwares. It can be beneficial for students and professionals in electronics and hardware design domains.

As PCB designs and circuit layouts become increasingly intricate, it becomes essential to have tools that can aid in design and verification. The Image-to-Netlist Conversion pipeline takes an image of a circuit layout and translates it into a functional netlist, helping streamline the design process and reverse-engineer existing designs.
- Remove the values to increase the clarity of input images for better conversion.
- Detects components like resistors, inductors, current sources, and voltage sources.
- Extracts routing information and connections between components.
- Outputs a SPICE-compatible netlist for simulations.
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For a detailed installation guide, please refer to this repository or watch our installation tutorial on YouTube.
- Nicholas Renotte: For his invaluable insights on training and setting up custom object detection model.
- OpenCV: For image processing tasks.
- TensorFlow: For providing the deep learning framework used in various components of this project.
- EasyOCR: For optical character recognition capabilities employed in this project.
- Network Analysis and Synthesis: Circuits Illustrated, authored by M.E. Van Valkenburg. This book was a pivotal resource for sourcing circuit images used in training the model. I express my sincere gratitude for the comprehensive compilation of circuit diagrams and the contribution it has made to my research.







