A stress test and benchmark suite for the PlayStation 3.
cellmark started as a way to verify Cell BE / XDR overclock stability against memtest86+ style patterns and a deterministic FMA accumulator. It has since grown into a fuller hardware characterisation suite covering the PPE core, all 6 SPEs, the EIB ring fabric, the XDR memory subsystem, and the disk path.
Both retail CFW and DECR-1000A development-kit build variants are supported. The DECR build links libperf for direct CBE Performance Monitor access on dev hardware.
Eleven pages, each covering a different part of the chip:
| Page | What it exercises |
|---|---|
| Cell | SPU compute on all 6 SPEs - SP/DP FMA, integer, reciprocal, shuffle, dual-issue |
| PPE | VMX and scalar FMA, FXU, SMT scaling, L1/L2 bandwidth and latency, store paths |
| XDR | memtest86+ style memory test, 15 patterns across all 6 SPEs |
| Disk | Sequential and random I/O, plus a 13-probe diagnostic suite |
| Cell DMA BW | Aggregate XDR <-> LS bandwidth, size/queue/stride/page sweeps |
| Fabric | EIB topology and saturation, atomics, mailboxes, branch hints |
| Workload | Pi BBP, FFT, N-body - scored, normalised to a stock 3.2 GHz PS3 |
| Burn-In | Every measured unit of the chip saturated at once |
| Render | SPE Mandelbrot and a Kleinian raymarcher with RSX display |
The headline number is CELLMARK: five compute disciplines, each normalised so a stock console scores 1000, combined as a geometric mean. Everything can also run headless and scripted.
docs/benchmarks.md describes every page in detail - what each kernel does, the measured numbers, and why they are what they are.
The compiled package is on the Releases page.
- Transfer
cellmark.pkgto the PS3 (FTP, USB,/dev_hdd0/packages/, etc.) - Install via Package Manager (
★ Install Package Files)
| Button | Action |
|---|---|
| L2 / R2 | Previous / next page (category) |
| L1 / R1 / D-pad | Previous / next benchmark within page |
| X (Cross) | Run selected disk bench / probe suite |
| Square | Toggle disk bench / probe view |
| Triangle | Toggle file logging |
| SELECT + START | Exit |
On the Render page the fractal benches take over the analog sticks and d-pad for pan/zoom/palette/hue. L2/R2 still works to leave.
File logging appends to /dev_hdd0/game/CELLMARK0 USRDIR/cellmark.log on every mode change, every memtest pass, and on exit, useful for long stability runs where you want a paper trail of what passed before something hung.
For headless scripted runs, drop an autobench.cfg next to the app; see docs/autobench.md.
python tools/build.py retail # build/cellmark.elf + cellmark.self (CFW)
python tools/build.py decr # build/cellmark_decr.elf + .self (ProDG/Target Manager)
python tools/build.py clean # remove build/
python tools/build.py spu_fft # rebuild just one SPU bench (faster iter)
python make_pkg.py --variant retail # build/cellmark.pkg (NPDRM-signed)
python make_pkg.py --variant decr # build/cellmark_decr.pkgRequires the Cell SDK 3.0 toolchain at C:\usr\local\cell (or override via CELL_SDK env var). Python 3.7+ for the build driver.
To add your own benchmark: python tools/new_bench.py raytracer --category workload scaffolds from _template/. See docs/adding_a_benchmark.md.
| Console | PS3 with CFW/HEN (retail or DEX) |
| Firmware | Tested on Evilnat 4.92. Should work on any modern CFW. |
| Best on | All. Though if you are chasing OC numbers, pre CECH-2000 systems are the best, but there are exceptions even among 2000 series (same motherboard revision, diferent part number or manufacturer) |
Different Cell process nodes (90 nm / 65 nm / 45 nm) hit different stability ceilings, and most non-trivial overclocks require overvolting. Use at your own risk! See cell-xdr-overclocking for the hardware side.
| benchmarks.md | what every page measures, in detail |
| cell_tuning.md | the optimization and measurement bible |
| ppe_tuning.md / spu_tuning.md / disk_tuning.md | subsystem deep dives |
| literature.md | 47 Cell papers mined for reference numbers, and where they agree or disagree with cellmark |
| autobench.md | headless scripted runs + stock baseline |
| architecture.md | source tree and engine internals |
| adding_a_benchmark.md | guide for extending cellmark |
This was built alongside cell-xdr-overclocking as a way to verify CELL/XDR overclock stability and measure how much performance an OC actually unlocks. The compute kernels tell you whether the SPEs are doing math correctly at the new clock; the memtest catches XDR errors that only appear under sustained load; the disk page exists because the stock PS3 disk benchmarks were terrible and an SSHD upgrade turned out to be bottlenecked entirely on the OS, not the drive.
If you find a configuration that fails here that worked in something else, open an issue! That's exactly the data this was built to surface.
The academic papers cellmark draws on are listed and mined in docs/literature.md.
- Nascar1243, villahed94, gypsy, RGBeter, NGX, DoublesAdvocate - Testing, feedback and moral support.
- Sony / IBM / Toshiba - Cell Broadband Engine Programming Handbook (v1.1, April 2007) and the SPU instruction timing reference; the PPE VMX latencies in
ppe_benchmarks.ccome from there. - memtest86+ - The test methodology used in
spu_memtest.cfollows the standard pattern set: Walking 1/0, Checkerboard, Moving Inversions, Bank Hammer, Bit Fade, etc. The patterns themselves are decades-old academic memory-testing techniques; this is an independent SPU/DMA implementation of them, but credit where it's due. - The PS3 developer community -
ps3py,scetool, and decades of patient reverse engineering.
MIT License