feat(format): gpu-weight-residency-v1 5-gate PARTIAL discharge#1377
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feat(format): gpu-weight-residency-v1 5-gate PARTIAL discharge#1377noahgift wants to merge 2 commits into
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Binds FALSIFY-GWR-001..005 from gpu-weight-residency-v1 at PARTIAL_ALGORITHM_LEVEL via 5 verdict functions. - GWR-001: nvidia-smi shows model_bytes resident at startup (±10%) - GWR-002: ≥ 180 tok/s on Qwen2.5-1.5B Q4K (RTX 4090) - GWR-003: zero `cudaMemcpyHtoD` per inference in steady state - GWR-004: GPU-vs-CPU output token-id parity (slice equality) - GWR-005: Grace Blackwell uses CU_MEM_ATTACH_GLOBAL flag ## Five Whys 1. Why does gpu-weight-residency-v1 list 5 falsification IDs without algorithm-level discharge? PMAT lints flagged FALSIFY-GWR-001..005 as unbound at PARTIAL_ALGORITHM_LEVEL. 2. Why does that block ship? Coverage % cannot move while peripheral GPU-residency contracts have no algorithm-level verdict module. 3. Why ±10% tolerance for GWR-001 vs strict equality? CUDA contexts add ~50-200MB overhead; nvidia-smi reports total VRAM use, not just the model footprint. Strict equality would Fail every healthy server. AC_GWR_RESIDENCY_TOLERANCE_PCT=10 absorbs context+kernel overhead but still flags lazy-load (observed = 0) and double-load (observed = 2× model_bytes). 4. Why a hard 0 floor for GWR-003 not "≤ small N"? The contract is binary by design — even one HtoD per inference indicates the weights aren't truly resident, and the cost compounds at 100s of layers × 1000s of tokens. Sub-threshold tolerance would mask the regression class. 5. Why case-sensitive flag-name match for GWR-005? CUDA `#define` strings are case-significant; downstream tooling that grep-checks "ATTACH_GLOBAL" must see exactly that. Case-insensitive matching would let `cu_mem_attach_global` (typo) pass even though the underlying allocation flag would be a different macro on Grace. Adds 29 unit tests including a 5-pct sweep on GWR-001's tolerance band and a 5-bucket TPS sweep on GWR-002. Realistic-healthy walks RTX 4090 / 440 tok/s; pre-fix walks 5 simultaneous regressions (zero residency, 50 tok/s PCIe-bound baseline, 64 HtoD, sampler drift, lazy Grace flag). No runtime % shift; algorithm-level coverage advances by 5 gates.
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Summary
gpu-weight-residency-v1atPARTIAL_ALGORITHM_LEVELvia 5 verdict functions.Gates bound
[model_bytes, model_bytes × 1.10]cudaMemcpyHtoDper inference in steady stateCU_MEM_ATTACH_GLOBALPinned constants
AC_GWR_MIN_TPS_RTX4090 = 180.0AC_GWR_RESIDENCY_TOLERANCE_PCT = 10.0AC_GWR_MAX_HTOD_PER_INFERENCE = 0AC_GWR_GRACE_ALLOC_FLAG = "CU_MEM_ATTACH_GLOBAL"(case-sensitive)Five Whys
See commit message — captures why ±10% for residency, hard 0 for HtoD, and case-sensitive Grace flag.
Test plan
cargo test -p aprender-core --lib gwr_001_005— 29 passed🤖 Generated with Claude Code