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[HIP] Test signed 23-bit division and remainder#423

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LU-JOHN:test_sdivrem23
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[HIP] Test signed 23-bit division and remainder#423
LU-JOHN wants to merge 2 commits into
llvm:mainfrom
LU-JOHN:test_sdivrem23

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@LU-JOHN

@LU-JOHN LU-JOHN commented Jun 12, 2026

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Test signed 23-bit division and remainder with a variety of values. Specifically, 23-bit NEG_MAX divided by -1 is tested. This shows why llvm/llvm-project#203436 is needed.

Signed-off-by: John Lu <John.Lu@amd.com>

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Pull request overview

Adds a new HIP test to exercise signed 23-bit division/remainder across a broad operand set (including the important NEG_MAX / -1 case) to demonstrate the need for the linked LLVM fix.

Changes:

  • Add new HIP test sdivrem23.hip that computes and validates signed 23-bit div/rem results on device vs host.
  • Add sdivrem23.reference_output to integrate the test into the suite’s verification flow.
  • Register the new test in External/HIP/CMakeLists.txt.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

File Description
External/HIP/sdivrem23.hip New signed 23-bit div/rem kernel + host-side input generation and result verification.
External/HIP/sdivrem23.reference_output Expected “PASSED!” output for the new test.
External/HIP/CMakeLists.txt Adds sdivrem23 to the HIP local test list.

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Comment thread External/HIP/sdivrem23.hip
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Comment thread External/HIP/sdivrem23.hip
Comment thread External/HIP/sdivrem23.hip
Comment thread External/HIP/CMakeLists.txt Outdated
Signed-off-by: John Lu <John.Lu@amd.com>
@jplehr

jplehr commented Jun 16, 2026

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Does the test work without the LLVM patch you are referencing or would it miscompile?

@LU-JOHN

LU-JOHN commented Jun 16, 2026

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Does the test work without the LLVM patch you are referencing or would it miscompile?

It will miscompile without llvm/llvm-project#203436.

LU-JOHN added a commit to llvm/llvm-project that referenced this pull request Jun 17, 2026
When expanding div/rem by using floating-point operations,
sign/zero-extending the result from the calculated DivBits input width
to 32-bits is unnecessary. CreateFPToSI or CreateFPToUI is called with a
32-bit int type so the conversion instruction will already produce a
result with the desired width.

Also it is incorrect. For signed-division `DIVBITS_MAX_NEG/-1`, the
result should be `-DIVBITS_MAX_NEG` a positive value. Sign-extension
will incorrectly return a negative result. For example, for DivBits=4,
`-8/-1 = 8`, but adding code to do a 28-bit sign-extension will
incorrectly return `-8`.

Tested in llvm/llvm-test-suite#423.

---------

Signed-off-by: John Lu <John.Lu@amd.com>
llvm-upstreamsync Bot pushed a commit to qualcomm/cpullvm-toolchain that referenced this pull request Jun 17, 2026
… (#203436)

When expanding div/rem by using floating-point operations,
sign/zero-extending the result from the calculated DivBits input width
to 32-bits is unnecessary. CreateFPToSI or CreateFPToUI is called with a
32-bit int type so the conversion instruction will already produce a
result with the desired width.

Also it is incorrect. For signed-division `DIVBITS_MAX_NEG/-1`, the
result should be `-DIVBITS_MAX_NEG` a positive value. Sign-extension
will incorrectly return a negative result. For example, for DivBits=4,
`-8/-1 = 8`, but adding code to do a 28-bit sign-extension will
incorrectly return `-8`.

Tested in llvm/llvm-test-suite#423.

---------

Signed-off-by: John Lu <John.Lu@amd.com>
llvm-sync Bot pushed a commit to arm/arm-toolchain that referenced this pull request Jun 17, 2026
… (#203436)

When expanding div/rem by using floating-point operations,
sign/zero-extending the result from the calculated DivBits input width
to 32-bits is unnecessary. CreateFPToSI or CreateFPToUI is called with a
32-bit int type so the conversion instruction will already produce a
result with the desired width.

Also it is incorrect. For signed-division `DIVBITS_MAX_NEG/-1`, the
result should be `-DIVBITS_MAX_NEG` a positive value. Sign-extension
will incorrectly return a negative result. For example, for DivBits=4,
`-8/-1 = 8`, but adding code to do a 28-bit sign-extension will
incorrectly return `-8`.

Tested in llvm/llvm-test-suite#423.

---------

Signed-off-by: John Lu <John.Lu@amd.com>
nasherm pushed a commit to nasherm/llvm-project that referenced this pull request Jun 18, 2026
When expanding div/rem by using floating-point operations,
sign/zero-extending the result from the calculated DivBits input width
to 32-bits is unnecessary. CreateFPToSI or CreateFPToUI is called with a
32-bit int type so the conversion instruction will already produce a
result with the desired width.

Also it is incorrect. For signed-division `DIVBITS_MAX_NEG/-1`, the
result should be `-DIVBITS_MAX_NEG` a positive value. Sign-extension
will incorrectly return a negative result. For example, for DivBits=4,
`-8/-1 = 8`, but adding code to do a 28-bit sign-extension will
incorrectly return `-8`.

Tested in llvm/llvm-test-suite#423.

---------

Signed-off-by: John Lu <John.Lu@amd.com>
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3 participants