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1. Design-of-AMBA-APB-Slave-UART-Wrapper Design-of-AMBA-APB-Slave-UART-Wrapper Public

   Verilog

2. FIR-Filter-Design-Using-Distributed-Arithmetic-for-Better-PPA FIR-Filter-Design-Using-Distributed-Arithmetic-for-Better-PPA Public

   Verilog

3. RISCV RISCV Public

4. Syncronous-FIFO Syncronous-FIFO Public

   HTML

5. Distance_Measurement_Using_HC-SR04_FPGA Distance_Measurement_Using_HC-SR04_FPGA Public

   Verilog

6. footstep-detection footstep-detection Public

   Python