Releases: freechipsproject/chisel-testers
Releases · freechipsproject/chisel-testers
v1.2.3
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ucbjrl
released this
04 Sep 17:02
This release contains the following fixes and features:
add treadle support. (#205 )
cleanup harness generation and add missing vl_finish() - support Verilator-3.922. (#208 )
v1.2.2
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ucbjrl
released this
26 Jul 19:30
This release contains the following enhancement and updates the expected versions of FIRRTL and Chisel3.
Add iverilog as a backend (#199 )
v1.2.1
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ucbjrl
released this
21 Jun 21:11
Cleanup deprecated loadAnnotations call. (#197 )
v1.2.0
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ucbjrl
released this
18 Apr 16:01
This release incorporates changes from v1.2.0-RC1 and v1.2.0-RC2. Please see the release notes from those candidates.
v1.2.0-RC2
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ucbjrl
released this
12 Apr 20:42
This release candidate includes the following bug fix and minor API change:
Set symbol separator for VCS harness - fix #193 (#195 )
Use ImplicitModule instead of LegacyModule. (#188 )
v1.2.0-RC1
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ucbjrl
released this
06 Mar 21:01
This release contains the following typo and bug fixes:
Update in light of annotations refactor. (#191 )
Use immutable getAnnotations in FirrtlTerpBackend (#189 )
Bump sbt to 1.1.1. (#190 )
Fix use of bare Bundle in MemPokeSpec. (#186 )
Replace deprecated usage: '!=' and 'Vec()'. (#187 )
Support Invalidate API (#182 )