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JIT: Allow optNarrowTree CAST case to match ULONG and LONG equivalently#129206

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AndyAyersMS merged 2 commits into
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AndyAyersMS:fix-arm64-cast-narrow-ulong-vs-long
Jun 12, 2026
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JIT: Allow optNarrowTree CAST case to match ULONG and LONG equivalently#129206
AndyAyersMS merged 2 commits into
dotnet:mainfrom
AndyAyersMS:fix-arm64-cast-narrow-ulong-vs-long

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Fixes #111888

Copilot AI review requested due to automatic review settings June 10, 2026 02:01
@github-actions github-actions Bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jun 10, 2026
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@dhartglassMSFT PTAL
fyi @dotnet/jit-contrib

Not many diffs, and again clustered in tests, but not a very big change either.

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Pull request overview

Updates CoreCLR JIT narrowing logic so optNarrowTree’s GT_CAST handling treats LONG and ULONG as equivalent (same actual type/width), enabling downstream ARM64 instruction combining to produce shifted-register forms in cases that previously got blocked by signedness mismatches in cast chains.

Changes:

  • CoreCLR JIT: relax optNarrowTree’s GT_CAST gate from exact-type equality to genActualType(...) equality, and broaden the “cast long” match to include ULONG via genActualType(tree) == TYP_LONG.
  • ARM64 codegen validation: update existing Neg/CMN instruction-combining tests to expect single-instruction shifted-register forms (neg ..., LSR #imm, cmn ..., LSR #imm).
  • Add/adjust tests to cover an MVN cast-chain LSR case and assert elimination of a redundant ARM64 mov for (uint)(ulong)x.

Reviewed changes

Copilot reviewed 5 out of 5 changed files in this pull request and generated no comments.

Show a summary per file
File Description
src/coreclr/jit/optimizer.cpp Allows optNarrowTree cast narrowing to proceed when srct and CastToType() differ only by signedness (e.g., LONG vs ULONG).
src/tests/JIT/opt/InstructionCombining/Neg.cs Updates ARM64 disasm expectations for NegLSR to the shifted-register neg form.
src/tests/JIT/opt/InstructionCombining/Cmn.cs Updates ARM64 disasm expectations for CmnLSR to the shifted-register cmn form.
src/tests/JIT/opt/InstructionCombining/Mvn.cs Adds MvnCastChainLSR test and runtime check validating MVN+LSR combining through a cast chain.
src/tests/JIT/opt/InstructionCombining/Casts.cs Tightens ARM64 expectation for (uint)(ulong)x to ensure no redundant mov remains.

Comment thread src/coreclr/jit/optimizer.cpp
Comment thread src/coreclr/jit/optimizer.cpp Outdated

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Changes LGTM, just a question about whether one change is actually doing anything and if we can maybe improve the comment.

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going to bounce to trigger new CI

@AndyAyersMS AndyAyersMS reopened this Jun 11, 2026
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Interestingly this has minopts diffs, evidently optNarrowTree is reachable from fgOptimizeEqualityComparisonWithConst without any optimization enabled check.

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Interestingly this has minopts diffs, evidently optNarrowTree is reachable from fgOptimizeEqualityComparisonWithConst without any optimization enabled check.

I think we have a few cases where opts like this aren't fully prevented in MinOpts, particularly via morph. We were discussing it on Discord a few weeks back and it'd probably be good to cleanup longer term, but obviously not critical to do right now.

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/ba-g unrelated test leg timing out

@AndyAyersMS AndyAyersMS merged commit 19274de into dotnet:main Jun 12, 2026
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Arm64: cmn & neg shifted register instructions are not generated for LSR

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