set T5 occupancy threshold at 100K

[slava77]

somewhat rounded upper limit.

• Not seen in 200 ttbar PU events.
• happens in about 3% of QCD 2 TeV dijet events (Using Mario's sample originally from 16_1_X)

[slava77]

run-ci: all

[slava77]

run-ci: all
modifiers: gpu

[slava77]

standalone jobs are expected to run, but the CMSSW is going to fail due to format mismatch (backward incompatibility of CMSSW_20_1)

[github-actions]

There was a problem while building and running in standalone mode. The logs can be found here.

[github-actions]

There was a problem while building and running in standalone mode. The logs can be found here.

[github-actions]

There was a problem while building and running with CMSSW. The logs can be found here.

[github-actions]

There was a problem while building and running with CMSSW. The logs can be found here.

[slava77]

run-ci: all
required-prs: 261

[github-actions]

The PR was built and ran successfully in standalone mode running on CPU. Here are some of the comparison plots.

The full set of validation and comparison plots can be found here.

Here is a timing comparison:

   Evt    Hits       MD       LS      T3       T5       pLS       pT5      pT3      TC       Reset    Event     Short             Rate
   avg     28.1    169.0    118.6    112.2     60.5    705.1     10.7     43.2     65.1    194.2      0.1    1506.8     773.5+/- 190.4     486.9   explicit[s=4] (target branch)
   avg     27.8    166.1    116.2    111.4     62.2    698.9     10.9     44.8     65.1    194.8      0.1    1498.3     771.6+/- 186.7     492.2   explicit[s=4] (this PR)

[github-actions]

The PR was built and ran successfully with CMSSW running on CPU. Here are some plots.

OOTB All Tracks

The full set of validation and comparison plots can be found here.