feat(wgmma): add m64n64k32 FP8 E4M3 full-drain path - #1306
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Vishalkulkarni45 wants to merge 6 commits into
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Vishalkulkarni45 wants to merge 6 commits into
Vishalkulkarni45 wants to merge 6 commits into
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Signed-off-by: vishal <vishalkoolkarni0045@gmail.com>
Signed-off-by: vishal <vishalkoolkarni0045@gmail.com>
Signed-off-by: vishal <vishalkoolkarni0045@gmail.com>
Signed-off-by: vishal <vishalkoolkarni0045@gmail.com>
Signed-off-by: vishal <vishalkoolkarni0045@gmail.com>
Signed-off-by: vishal <vishalkoolkarni0045@gmail.com>
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@nihalpasham can u review this |
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Summary
Adds the shared-memory
wgmma.mma_async.sync.aligned.m64n64k32.f32.e4m3.e4m3path requested in #1281. This draft asks for review of the compiler implementation and H100 validation program before renting the GPU.Refs #1281.
Status
m64n64k32, fixed TN layoutcuda-device,dialect-nvvm,mir-importer, andmir-lowerfence → MMA → commit_group → wait_group<0>with 32 tied F32 accumulatorsSUCCESSafter validation64 × 64 × 64workSUCCESSoutputImplementation
wait_group<0>.make_smem_descfor nonoverlapping K-major tiles: SW32, 32-byte K span, 256-byte group stride, and 256-byte base alignment.H100 validation
The example validates all 4096 outputs against an F32 reference decoded from the represented E4M3 inputs. The benchmark uses 8192 CTAs, 10 alternating warmups, and 11 alternating samples of 100 CUDA-event-timed launches.
m64n64k16× 4m64n64k32× 2Local verification
sm_90acubin materialization passed with CUDA 13.0.The full
just checksuite and live GPU smoketests were not run.