fix: verification#21
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![github-code-quality[bot]](https://avatars.githubusercontent.com/u/9919?s=60&v=4){kind=small}
| dh = int(die_h / dbu) | ||
|
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| # Get current layout bounds | ||
| bbox = top.bbox() |
| top = layout.cell(top_cell_name) | ||
| if top is None: | ||
| print(f"ERROR: Top cell '{top_cell_name}' not found") | ||
| exit(1) |
| core_module = os.environ.get("CORE_MODULE", "AegisFPGA") | ||
| chip_module = os.environ.get("CHIP_MODULE", "AegisFPGAChip") | ||
| pad_bidir = os.environ.get("PAD_BIDIR", "gf180mcu_fd_io__bi_t") | ||
| pad_input = os.environ.get("PAD_INPUT", "gf180mcu_fd_io__in_s") |
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