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RISC16

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Quentin Delhaye edited this page Mar 7, 2022 · 22 revisions

Instructions

  • Don't forget to add a NOP after a MOVI (if you're writing your directly into the simulator).
  • JALR does not work with a label.
  • Don't forget to end your code with HALT

Simulator

  • When writing instructions in the simulator, you first need to press the Assembly button at the bottom before you can run it. If what is in the Content column is not the correct opcode for your ASM command, you probably did not press the Assembly button.
  • Only put ONE HALT at the end of any code (use BEQ 0,0, to jump to the halt and the end of your code)
  • In the REGISTER BANK block, 1 and 2 designate the input operands, T the destination (a.k.a. target).
  • When using a label, don't put a space between the label and the column :.
  • Labels should not be alone on a line, place them in front of instructions.
  • Labels should not contain any word or part of word that may also be an instruction, like "addition", "nand_this".

Online simulator

  • Check you chose the correct exercise.
  • Many students will forget that the online simulator will erase the first 2n lines of any uploaded code, where n is the number of input registers needed for the exercise.

Here are some more considerations about the erasure of the first few lines:

  1. The online simulator is only needed for specific question, chosen through the drop-down list on the welcome screen.
  2. The online simulator needs to test the program for different input values, e.g. is 0 * 0 = 0 ? Is 1 * 45 = 45 ? To do so, it assumes the input operands (1 and 45 hereabove) are stored in some specific registers. The simulator will replace the first few lines of the program with movi instructions to load those values in the appropriate registers. Why overwrite the first lines and not prepend the uploaded code? So that the user can use the same trick for the offline simulator: the first lines of the program are the movi instructions to load the registers.

For example, the question 8 of the first lab tells you that it will add the "unsigned content of 32-bit numbers stored in reg4(MSB), reg3 and reg6(MSB), reg5 and writes the result in reg4(MSB), reg3." This sums up to 4 input registers needed to be filled.

This means that the online simulator will replace the 4 * 2 = 8 instructions (4 registers are used and movi needs 2 opcodes) with movi instructions. The best way to leverage this behaviour is to mimic it offline: use the first 4 lines (in the case of question 8) to load registers 3 through 6. Beware, if you insert nop instructions in between your movi, you may not pass the online tests, as some instructions will not be overwritten by the online tool.

Labels

Don't leave a label alone on its line, it might pose problem when "assembling" the instructions.

label:
       addi 1,1,1 // BAD

label: addi 1,1,1 // GOOD

Lab

  • By the end of the first lab, you should have answered up to question 5.
  • Question 3: Don't spend too much time on the graph. The idea is to analyse a full instruction and spot which blocks are active at every half-clock.
  • Labs 1 & 2: risc16.jar or RiSC16_seq.jar. Lab 3: RiSC16asm.jar. Lab 4: RiSC16_pipeline.jar.

CPI

How do we compare sequential and pipelined architectures, CPI-wise?

In this context, we talk about "cycle per instruction" where a cycle is the time unit needed to get the result from one instruction. For a sequential implementation, one instruction is outputted every cycle (CPI = 1), but it needs 20 half-clock cycles to do so.

However, a pipelined architecture with a CPI = 1 will be faster as each cycle only lasts 14 half-clock cycles. It would thus be 20/14 = 1.43 times faster.

A higher CPI does not necessarily mean that the architecture is worst, it should put into perspective with the half-clock cycle duration of a cycle.

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