@@ -50,7 +50,7 @@ class AccumulatorWriteReq[T <: Data: Arithmetic](n: Int, t: Vec[Vec[T]]) extends
5050
5151
5252class AccumulatorMemIO [T <: Data : Arithmetic , U <: Data ](n : Int , t : Vec [Vec [T ]], scale_t : U , half_t : Vec [Vec [T ]],
53- acc_sub_banks : Int , use_shared_ext_mem : Boolean , use_mx_scaling : Boolean , meshRows : Int , tileRows : Int , bankWidthBits : Int
53+ acc_sub_banks : Int , use_shared_ext_mem : Boolean , use_mx_scaling : Boolean , meshRows : Int , tileRows : Int
5454) extends Bundle {
5555 val read = Flipped (new AccumulatorReadIO (n, t, scale_t, half_t))
5656 val write = Flipped (Decoupled (new AccumulatorWriteReq (n, t)))
@@ -134,8 +134,8 @@ class AccumulatorMem[T <: Data, U <: Data](
134134 val half_t = Vec (t.length / 2 , t.head.cloneType)
135135
136136 // TODO unify this with TwoPortSyncMemIO
137- val io = IO (new AccumulatorMemIO (n, t, scale_t, half_t, acc_sub_banks, use_shared_ext_mem, use_mx_scaling, meshRows, tileRows, scale_mem.get.bankWidthBits ))
138-
137+ val io = IO (new AccumulatorMemIO (n, t, scale_t, half_t, acc_sub_banks, use_shared_ext_mem, use_mx_scaling, meshRows, tileRows))
138+
139139 val scaleFactorMem = scale_mem.map { conf =>
140140 // println(s"[ScalingFactorMem Config]")
141141 // println(s" depth = ${conf.depth}")
@@ -156,15 +156,7 @@ class AccumulatorMem[T <: Data, U <: Data](
156156 def calculateScaleAddr (write_addr : UInt ): UInt = {
157157 (write_addr & (~ (" h_f" .U )).asUInt).asUInt // TODO: Using the accmulator write addr to caculate the scaling memory read addr, for simplification
158158 }
159- // def applyMxScaling(data: Vec[Vec[T]], scales: Vec[Vec[UInt]]): Vec[Vec[T]] = {
160- // val scaled = Wire(data.cloneType)
161- // for (i <- 0 until data.length) {
162- // for (j <- 0 until data(i).length) {
163- // scaled(i)(j) := applyE9M0Scale(data(i)(j), scales(i)(j), 8, 7)
164- // }
165- // }
166- // scaled
167- // }
159+
168160 def applyE9M0Scale [T <: Data ](
169161 value : T ,
170162 scale_e9m0 : UInt ,
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