Fix #755: ARM benchmarks run without crash or swap

* Drain pipeline queue before destruction → removes SIGABRT on aarch64.
* Reduce ctl contention iterations to 200k on aarch64 on 2 GB Pi.

Author: janibakin

src/tests/roc_ctl/bench_task_queue_contention.cpp

@@ -17,7 +17,11 @@ namespace ctl {
 namespace {
 
 enum {
+#ifdef __aarch64__
+    NumScheduleIterations = 200000,
+#else
     NumScheduleIterations = 2000000,
+#endif
     NumScheduleAfterIterations = 20000,
     NumThreads = 8,
     BatchSize = 1000

src/tests/roc_pipeline/bench_pipeline_loop_peak_load.cpp

@@ -495,6 +495,8 @@ void BM_PipelinePeakLoad_PreciseSchedOff(benchmark::State& state) {
     task_thr.stop();
     task_thr.join();
 
+    pipeline.stop_and_wait();
+
     stats.export_counters(state);
     pipeline.export_counters(state);
 }
@@ -525,6 +527,8 @@ void BM_PipelinePeakLoad_PreciseSchedOn(benchmark::State& state) {
     task_thr.stop();
     task_thr.join();
 
+    pipeline.stop_and_wait();
+
     stats.export_counters(state);
     pipeline.export_counters(state);
 }