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ezelioliezelioli
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test: improve testbench
1 parent 3b45158 commit 1bad1d2

19 files changed

Lines changed: 1648 additions & 91 deletions

‎Bender.lock‎

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Original file line numberDiff line numberDiff line change
@@ -32,6 +32,14 @@ packages:
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dependencies:
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- common_cells
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- register_interface
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clint:
36+
revision: d5390a805c20f9226758a152ba1645f61da73349
37+
version: 0.2.0
38+
source:
39+
Git: https://github.com/pulp-platform/clint.git
40+
dependencies:
41+
- common_cells
42+
- register_interface
3543
common_cells:
3644
revision: 9ca8a7655f741e7dd5736669a20a301325194c28
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version: 1.39.0
@@ -61,6 +69,15 @@ packages:
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Git: https://github.com/pulp-platform/fpu_div_sqrt_mvp.git
6270
dependencies:
6371
- common_cells
72+
opentitan_peripherals:
73+
revision: cd3153de2783abd3d03d0595e6c4b32413c62f14
74+
version: 0.4.0
75+
source:
76+
Git: https://github.com/pulp-platform/opentitan_peripherals.git
77+
dependencies:
78+
- common_cells
79+
- register_interface
80+
- tech_cells_generic
6481
register_interface:
6582
revision: d6e1d4cdaab7870f4faf3f88a1c788eaf5ac129d
6683
version: 0.4.7

‎Bender.yml‎

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Original file line numberDiff line numberDiff line change
@@ -15,7 +15,9 @@ dependencies:
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{ git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13 }
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axi_riscv_atomics: { git: "https://github.com/pulp-platform/axi_riscv_atomics.git", version: 0.8.3 }
1717
clic: { git: "https://github.com/pulp-platform/clic.git", version: 3.0.0 }
18+
clint: { git: "https://github.com/pulp-platform/clint.git", version: 0.2.0 }
1819
common_verification: { git: "https://github.com/pulp-platform/common_verification", version: 0.2.5 }
20+
opentitan_peripherals: { git: "https://github.com/pulp-platform/opentitan_peripherals.git", version: 0.4.0 }
1921
register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.7 }
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2123
export_include_dirs:
@@ -303,7 +305,11 @@ sources:
303305
- target: cva6tb
304306
files:
305307
- test/hw/cva6tb_pkg.sv
308+
- test/hw/bootrom/cva6tb_bootrom.sv
309+
- test/hw/cva6tb_clk_rst_gen.sv
310+
- test/hw/cva6tb_hwmon.sv
306311
- test/hw/cva6tb_regs.sv
312+
- test/hw/cva6tb_rtc_timer.sv
307313
- test/hw/cva6tb_sim_console.sv
308314
- test/hw/cva6tb_soc.sv
309315

‎test/Makefile‎

Lines changed: 59 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,63 @@ $(ROOT_DIR)/Bender.lock:
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$(BENDER) checkout
5858
touch $@
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60+
##################################
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##### Hardware dependencies ######
62+
##################################
63+
64+
ifeq ($(shell test -d $(ROOT_DIR)/.bender || echo 1),)
65+
CLINTROOT := $(shell $(BENDER) path clint)
66+
REGTOOL := $(shell $(BENDER) path register_interface)/vendor/lowrisc_opentitan/util/regtool.py
67+
OTPROOT := $(shell $(BENDER) path opentitan_peripherals)
68+
else
69+
CLINTROOT := $(ROOT_DIR)/clint
70+
REGTOOL := regtool.py
71+
OTPROOT := $(ROOT_DIR)/opentitan_peripherals
72+
endif
73+
74+
CLINTCORES := 1
75+
include $(CLINTROOT)/clint.mk
76+
$(CLINTROOT)/.generated:
77+
flock -x $@ $(MAKE) clint && touch $@
78+
79+
include $(OTPROOT)/otp.mk
80+
$(OTPROOT)/.generated: $(TEST_DIR)/hw/rv_plic.cfg.hjson
81+
flock -x $@ sh -c "cp $< $(dir $@)/src/rv_plic/; $(MAKE) -j1 otp" && touch $@ || rm $@
82+
83+
HW_DEPS := $(CLINTROOT)/.generated $(OTPROOT)/.generated
84+
85+
##################################
86+
########### Bootrom ##############
87+
##################################
88+
89+
RV_BINROOT ?= $(dir $(shell which riscv64-unknown-elf-gcc))
90+
RV_AR := $(RV_BINROOT)/riscv64-unknown-elf-ar
91+
RV_CC := $(RV_BINROOT)/riscv64-unknown-elf-gcc
92+
RV_OBJCOPY := $(RV_BINROOT)/riscv64-unknown-elf-objcopy
93+
RV_OBJDUMP := $(RV_BINROOT)/riscv64-unknown-elf-objdump
94+
95+
BROM_CC_FLAGS = -DOT_PLATFORM_RV32 -march=rv64gc_zifencei -mabi=lp64d \
96+
-mstrict-align -O2 -Wall -Wextra -static -ffunction-sections \
97+
-fdata-sections -frandom-seed=cheshire -fuse-linker-plugin \
98+
-nostartfiles -Os -fno-zero-initialized-in-bss \
99+
-fwhole-program -flto -Wl,-flto -Wl,--gc-sections
100+
101+
$(TEST_DIR)/hw/bootrom/cva6tb_bootrom.bin: $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.ld $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.S
102+
$(RV_CC) -T$< $(BROM_CC_FLAGS) -o $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.elf $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.S
103+
$(RV_OBJDUMP) -d $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.elf > $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.dump
104+
$(RV_OBJCOPY) -O binary $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.elf $@
105+
106+
$(TEST_DIR)/hw/bootrom/cva6tb_bootrom.sv: $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.bin $(TEST_DIR)/util/gen_bootrom.py
107+
$(TEST_DIR)/util/gen_bootrom.py --sv-module cva6tb_bootrom $< > $@
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.PHONY: bootrom
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bootrom: $(TEST_DIR)/hw/bootrom/cva6tb_bootrom.sv
111+
112+
.PHONY: bootrom-clean
113+
bootrom-clean:
114+
cd $(TEST_DIR)/hw/bootrom && rm -f *.sv *.elf *.bin *.dump
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116+
60117
##################################
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########## QuestaSim #############
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##################################
@@ -76,7 +133,7 @@ VOPT_FLAGS += +acc
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$(VSIM_BUILD_DIR):
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@mkdir -p $(VSIM_BUILD_DIR)
78135

79-
$(VSIM_BUILD_DIR)/vsim_compile.tcl: $(ROOT_DIR)/Bender.lock | $(VSIM_BUILD_DIR)
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$(VSIM_BUILD_DIR)/vsim_compile.tcl: $(ROOT_DIR)/Bender.lock $(HW_DEPS) | $(VSIM_BUILD_DIR)
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$(BENDER) script vsim $(BENDER_FLAGS) --vlog-arg="$(VLOG_FLAGS)" > $@
81138
@echo 'vopt $(VOPT_FLAGS) test -o test_opt' >> $@
82139

@@ -117,7 +174,7 @@ VERILATOR_FLAGS := --binary -j 0 --Mdir $(VERILATOR_BUILD_DIR) $(VERILATOR_W
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$(VERILATOR_LOG_DIR):
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@mkdir -p $(VERILATOR_LOG_DIR)
119176

120-
$(VERILATOR_FLIST): $(ROOT_DIR)/Bender.lock
177+
$(VERILATOR_FLIST): $(ROOT_DIR)/Bender.lock $(HW_DEPS)
121178
$(BENDER) script verilator $(BENDER_FLAGS) -t verilator > $@
122179

123180
$(VERILATOR_BUILD_DIR)/Vtest: $(VERILATOR_FLIST) | $(VERILATOR_LOG_DIR)

‎test/hw/bootrom/.gitignore‎

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@@ -0,0 +1,2 @@
1+
*.bin
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*.elf

‎test/hw/bootrom/cva6tb_bootrom.S‎

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// Copyright 2026 ETH Zurich and University of Bologna.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Enrico Zelioli <ezelioli@iis.ee.ethz.ch>
6+
7+
.section .text._start
8+
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.global _start
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.align 4
11+
_start:
12+
li x1, 0
13+
li x2, 0
14+
li x3, 0
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li x4, 0
16+
li x5, 0
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li x6, 0
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li x7, 0
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li x8, 0
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li x9, 0
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li x10, 0
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li x11, 0
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li x12, 0
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li x13, 0
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li x14, 0
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li x15, 0
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li x16, 0
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li x17, 0
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li x18, 0
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li x19, 0
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li x20, 0
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li x21, 0
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li x22, 0
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li x23, 0
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li x24, 0
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li x25, 0
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li x26, 0
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li x27, 0
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li x28, 0
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li x29, 0
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li x30, 0
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li x31, 0
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44+
// Init stack and global pointer with safe, linked values
45+
la sp, __stack_pointer$
46+
.option push
47+
.option norelax
48+
la gp, __global_pointer$
49+
.option pop
50+
51+
// Set trap handler
52+
la t0, __trap_handler
53+
csrw mtvec, t0
54+
55+
// Check boot mode
56+
la t0, __base_regs
57+
lw t1, 0(t0)
58+
bne t1, zero, __boot_spm
59+
60+
__boot_dram:
61+
csrr a0, mhartid
62+
la t0, __base_dram
63+
jalr ra, 0(t0)
64+
j _exit
65+
66+
__boot_spm:
67+
csrr a0, mhartid
68+
la t0, __base_spm
69+
jalr ra, 0(t0)
70+
71+
// If main returns, we end up here
72+
.global _exit
73+
_exit:
74+
// Set EOC, then wait forever
75+
slli a0, a0, 1
76+
ori a0, a0, 1
77+
la t0, __base_regs
78+
sw a0, 4(t0)
79+
1:
80+
wfi
81+
j 1b
82+
83+
.align 8
84+
__trap_handler:
85+
csrr t0, mcause
86+
1:
87+
wfi
88+
j 1b

‎test/hw/bootrom/cva6tb_bootrom.dump‎

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1+
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/scratch/ezelioli/projects/cva6rt/runtimes/cva6/test/hw/bootrom/cva6tb_bootrom.elf: file format elf64-littleriscv
3+
4+
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Disassembly of section .text:
6+
7+
0000000000010000 <_start>:
8+
10000: 4081 li ra,0
9+
10002: 4101 li sp,0
10+
10004: 4181 li gp,0
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10006: 4201 li tp,0
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10008: 4281 li t0,0
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1000a: 4301 li t1,0
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1000c: 4381 li t2,0
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1000e: 4401 li s0,0
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10010: 4481 li s1,0
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10012: 4501 li a0,0
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10014: 4581 li a1,0
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10016: 4601 li a2,0
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10018: 4681 li a3,0
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1001a: 4701 li a4,0
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1001c: 4781 li a5,0
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1001e: 4801 li a6,0
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10020: 4881 li a7,0
25+
10022: 4901 li s2,0
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10024: 4981 li s3,0
27+
10026: 4a01 li s4,0
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10028: 4a81 li s5,0
29+
1002a: 4b01 li s6,0
30+
1002c: 4b81 li s7,0
31+
1002e: 4c01 li s8,0
32+
10030: 4c81 li s9,0
33+
10032: 4d01 li s10,0
34+
10034: 4d81 li s11,0
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10036: 4e01 li t3,0
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10038: 4e81 li t4,0
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1003a: 4f01 li t5,0
38+
1003c: 4f81 li t6,0
39+
1003e: 200f0117 auipc sp,0x200f0
40+
10042: fba10113 addi sp,sp,-70 # 200ffff8 <__stack_pointer$>
41+
10046: 00000197 auipc gp,0x0
42+
1004a: 10a18193 addi gp,gp,266 # 10150 <__base_heap>
43+
1004e: 00000297 auipc t0,0x0
44+
10052: 0b228293 addi t0,t0,178 # 10100 <__trap_handler>
45+
10056: 30529073 csrw mtvec,t0
46+
1005a: 0fff0297 auipc t0,0xfff0
47+
1005e: fa628293 addi t0,t0,-90 # 10000000 <__base_regs>
48+
10062: 0002a303 lw t1,0(t0)
49+
10066: 00031b63 bnez t1,1007c <__boot_spm>
50+
51+
000000000001006a <__boot_dram>:
52+
1006a: f1402573 csrr a0,mhartid
53+
1006e: 7fff0297 auipc t0,0x7fff0
54+
10072: f9228293 addi t0,t0,-110 # 80000000 <__base_dram>
55+
10076: 000280e7 jalr t0
56+
1007a: a809 j 1008c <_exit>
57+
58+
000000000001007c <__boot_spm>:
59+
1007c: f1402573 csrr a0,mhartid
60+
10080: 1fff0297 auipc t0,0x1fff0
61+
10084: f8028293 addi t0,t0,-128 # 20000000 <__base_spm>
62+
10088: 000280e7 jalr t0
63+
64+
000000000001008c <_exit>:
65+
1008c: 0506 slli a0,a0,0x1
66+
1008e: 00156513 ori a0,a0,1
67+
10092: 0fff0297 auipc t0,0xfff0
68+
10096: f6e28293 addi t0,t0,-146 # 10000000 <__base_regs>
69+
1009a: 00a2a223 sw a0,4(t0)
70+
1009e: 10500073 wfi
71+
100a2: bff5 j 1009e <_exit+0x12>
72+
100a4: 00000013 nop
73+
100a8: 00000013 nop
74+
100ac: 00000013 nop
75+
100b0: 00000013 nop
76+
100b4: 00000013 nop
77+
100b8: 00000013 nop
78+
100bc: 00000013 nop
79+
100c0: 00000013 nop
80+
100c4: 00000013 nop
81+
100c8: 00000013 nop
82+
100cc: 00000013 nop
83+
100d0: 00000013 nop
84+
100d4: 00000013 nop
85+
100d8: 00000013 nop
86+
100dc: 00000013 nop
87+
100e0: 00000013 nop
88+
100e4: 00000013 nop
89+
100e8: 00000013 nop
90+
100ec: 00000013 nop
91+
100f0: 00000013 nop
92+
100f4: 00000013 nop
93+
100f8: 00000013 nop
94+
100fc: 00000013 nop
95+
96+
0000000000010100 <__trap_handler>:
97+
10100: 342022f3 csrr t0,mcause
98+
10104: 10500073 wfi
99+
10108: bff5 j 10104 <__trap_handler+0x4>
100+
...

‎test/hw/bootrom/cva6tb_bootrom.ld‎

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1+
/* Copyright 2026 ETH Zurich and University of Bologna. */
2+
/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
3+
/* SPDX-License-Identifier: Apache-2.0 */
4+
5+
ENTRY(_start)
6+
7+
MEMORY {
8+
dram (rwx) : ORIGIN = 0x80000000, LENGTH = 8M,
9+
spm (rwx) : ORIGIN = 0x20000000, LENGTH = 1M,
10+
bootrom (rx) : ORIGIN = 0x00010000, LENGTH = 1K
11+
}
12+
13+
SECTIONS {
14+
__global_pointer$ = ADDR(.misc) + SIZEOF(.misc) / 2;
15+
__stack_pointer$ = ORIGIN(spm) + LENGTH(spm) - 8;
16+
17+
.text : {
18+
*(.text._start)
19+
*(.text)
20+
*(.text.*)
21+
} > bootrom
22+
23+
.misc : ALIGN(16) {
24+
*(.rodata)
25+
*(.rodata.*)
26+
*(.data)
27+
*(.data.*)
28+
*(.srodata)
29+
*(.srodata.*)
30+
*(.sdata)
31+
*(.sdata.*)
32+
} > bootrom
33+
34+
. = ALIGN(32);
35+
__bss_start = .;
36+
.bss : {
37+
*(.bss)
38+
*(.bss.*)
39+
*(.sbss)
40+
*(.sbss.*)
41+
} > bootrom
42+
. = ALIGN(32);
43+
__bss_end = .;
44+
45+
.bulk : ALIGN(16) {
46+
*(.bulk)
47+
*(.bulk.*)
48+
} > bootrom
49+
50+
/* Relevant addresses */
51+
__base_regs = 0x10000000;
52+
__base_console = 0x10001000;
53+
__base_clic = 0x10040000;
54+
__base_clint = 0x02040000;
55+
__base_plic = 0x0c000000;
56+
__base_dram = ORIGIN(dram);
57+
__base_spm = ORIGIN(spm);
58+
__base_heap = ADDR(.bulk) + SIZEOF(.bulk);
59+
60+
}

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