Add Wasm32 ISA and PackedSimd ISA#129140
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…28 definitions for Wasm
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Pull request overview
This PR extends the CoreCLR JIT/EE instruction-set model to include a Wasm32 architecture with WasmBase, PackedSimd, and a synthetic Vector128 ISA, and wires those through the existing ThunkGenerator-driven codegen outputs (managed + native) including ReadyToRun (R2R) instruction set values. It also bumps the JIT/EE interface GUID as required when ISA definitions change.
Changes:
- Add
Wasm32 -> TARGET_WASMmapping in the thunk generator to produce correct#ifdef TARGET_WASMguards. - Define Wasm32 ISAs (
WasmBase,PackedSimd,Vector128) + implication rules inInstructionSetDesc.txt, updatingNEXT_AVAILABLE_R2R_BIT. - Regenerate/update managed and native instruction set enums/mappings (CorInfo + R2R) and bump
JITEEVersionIdentifier.
Reviewed changes
Copilot reviewed 8 out of 8 changed files in this pull request and generated 1 comment.
Show a summary per file
| File | Description |
|---|---|
| src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs | Maps Wasm32 to WASM so generated native guards use TARGET_WASM. |
| src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt | Adds Wasm32 ISA definitions + implication chain and reserves R2R bits 91–92. |
| src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs | Adds Wasm32 ISA enums and implication/lookup support in the managed JIT interface model. |
| src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs | Maps Wasm32 instruction sets to R2R instruction sets (with Vector128 remaining non-R2R). |
| src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs | Adds WasmBase=91 and PackedSimd=92 to the managed R2R enum. |
| src/coreclr/inc/readytoruninstructionset.h | Adds READYTORUN_INSTRUCTION_WasmBase=91 and ..._PackedSimd=92 to the native R2R enum. |
| src/coreclr/inc/jiteeversionguid.h | Updates the JIT/EE interface GUID to reflect the ISA contract change. |
| src/coreclr/inc/corinfoinstructionset.h | Adds TARGET_WASM instruction set IDs, validation, string conversion, and R2R mapping. |
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| switch (targetArch) | ||
| { | ||
| case TargetArchitecture.ARM64: | ||
| platformIntrinsicNamespace = "System.Runtime.Intrinsics.Arm"; | ||
| break; | ||
|
|
||
| case TargetArchitecture.Wasm32: | ||
| platformIntrinsicNamespace = "System.Runtime.Intrinsics.Wasm"; | ||
| break; | ||
|
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| else if (architecture is TargetArchitecture.Wasm32) | ||
| { | ||
| // TODO-WASM: return the correct intrinsic id once xplat intrinsics are implemented. | ||
| return ""; | ||
| } |
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| ; The ISA definitions should also be mapped to `hwintrinsicIsaRangeArray` in hwintrinsic.cpp. | ||
| ; NEXT_AVAILABLE_R2R_BIT = 91 | ||
| ; NEXT_AVAILABLE_R2R_BIT = 93 |
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Adds ISA definitions for
WasmBase,PackedSimd, andVector128. SIMD support won't be utilized yet, but this is a precursor to ongoing SIMD work.