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SwapnilGaikwadSwapnilGaikwad
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Arm64:[PAC-RET] Instruction encodings (#127949)
This PR adds instruction encodings for Pointer Authentication instructions, especially the B key variants. Part of this is useful for #125436 and #127838. Add encoding for: 1. AUTIB 2. AUTIB1716 3. AUTIBSP 4. AUTIBZ 5. AUTIZB 6. PACIB 7. PACIB1716 8. PACIBSP 9. PACIBZ 10. PACIZB 11. RETAA 12. RETAB
1 parent 37bcf38 commit ab8649f

4 files changed

Lines changed: 91 additions & 9 deletions

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‎src/coreclr/jit/codegenarm64test.cpp‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9140,23 +9140,37 @@ void CodeGen::genArm64EmitterUnitTestsPac()
91409140

91419141
genDefineTempLabel(genCreateTempLabel());
91429142

9143+
// IF_BR_0A
9144+
theEmitter->emitIns(INS_retaa); // RETAA
9145+
theEmitter->emitIns(INS_retab); // RETAB
9146+
91439147
// IF_PC_0A
91449148
theEmitter->emitIns(INS_autia1716); // AUTIA1716
91459149
theEmitter->emitIns(INS_autiasp); // AUTIASP
9150+
theEmitter->emitIns(INS_autib1716); // AUTIB1716
9151+
theEmitter->emitIns(INS_autibsp); // AUTIBSP
9152+
theEmitter->emitIns(INS_autibz); // AUTIBZ
91469153
theEmitter->emitIns(INS_autiaz); // AUTIAZ
91479154
theEmitter->emitIns(INS_pacia1716); // PACIA1716
91489155
theEmitter->emitIns(INS_paciasp); // PACIASP
91499156
theEmitter->emitIns(INS_paciaz); // PACIAZ
9157+
theEmitter->emitIns(INS_pacib1716); // PACIB1716
9158+
theEmitter->emitIns(INS_pacibsp); // PACIBSP
9159+
theEmitter->emitIns(INS_pacibz); // PACIBZ
91509160
theEmitter->emitIns(INS_xpaclri); // XPACLRI
91519161

91529162
// IF_PC_1A
91539163
theEmitter->emitIns_R(INS_autiza, EA_8BYTE, REG_R1); // AUTIZA <Xd>
9164+
theEmitter->emitIns_R(INS_autizb, EA_8BYTE, REG_R2); // AUTIZB <Xd>
91549165
theEmitter->emitIns_R(INS_paciza, EA_8BYTE, REG_R8); // PACIZA <Xd>
9166+
theEmitter->emitIns_R(INS_pacizb, EA_8BYTE, REG_R9); // PACIZB <Xd>
91559167
theEmitter->emitIns_R(INS_xpacd, EA_8BYTE, REG_R10); // XPACD <Xd>
91569168
theEmitter->emitIns_R(INS_xpaci, EA_8BYTE, REG_R12); // XPACI <Xd>
91579169

91589170
// IF_PC_2A
91599171
theEmitter->emitIns_R_R(INS_autia, EA_8BYTE, REG_R20, REG_SP); // AUTIA <Xd>, <Xn|SP>
9172+
theEmitter->emitIns_R_R(INS_autib, EA_8BYTE, REG_R21, REG_SP); // AUTIB <Xd>, <Xn|SP>
91609173
theEmitter->emitIns_R_R(INS_pacia, EA_8BYTE, REG_R27, REG_SP); // PACIA <Xd>, <Xn|SP>
9174+
theEmitter->emitIns_R_R(INS_pacib, EA_8BYTE, REG_R28, REG_SP); // PACIB <Xd>, <Xn|SP>
91619175
}
91629176
#endif // defined(TARGET_ARM64) && defined(DEBUG)

‎src/coreclr/jit/emitarm64.cpp‎

Lines changed: 36 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -210,6 +210,9 @@ void emitter::emitInsSanityCheck(instrDesc* id)
210210
assert(isValidImmShift(emitGetInsSC(id), id->idOpSize()));
211211
break;
212212

213+
case IF_BR_0A: // BR_0A ................ ................
214+
break;
215+
213216
case IF_BR_1A: // BR_1A ................ ......nnnnn..... Rn
214217
assert(isGeneralRegister(id->idReg1()));
215218
break;
@@ -1112,10 +1115,11 @@ bool emitter::emitInsMayWriteToGCReg(instrDesc* id)
11121115
return true;
11131116

11141117
case IF_PC_1A: // PC_1A ................ ...........ddddd Rd
1115-
return (ins == INS_autiza || ins == INS_paciza || ins == INS_xpacd || ins == INS_xpaci);
1118+
return (ins == INS_autiza || ins == INS_autizb || ins == INS_paciza || ins == INS_pacizb ||
1119+
ins == INS_xpacd || ins == INS_xpaci);
11161120

11171121
case IF_PC_2A: // PC_2A X........X...... ......nnnnnddddd Rd Rn
1118-
return (ins == INS_autia || ins == INS_pacia);
1122+
return (ins == INS_autia || ins == INS_autib || ins == INS_pacia || ins == INS_pacib);
11191123

11201124
case IF_SR_1A: // SR_1A ................ ...........ttttt Rt (dc zva, mrs)
11211125
return ins == INS_mrs_tpid0;
@@ -3719,13 +3723,24 @@ void emitter::emitIns(instruction ins)
37193723
case INS_autia1716:
37203724
case INS_autiasp:
37213725
case INS_autiaz:
3726+
case INS_autib1716:
3727+
case INS_autibsp:
3728+
case INS_autibz:
37223729
case INS_pacia1716:
37233730
case INS_paciasp:
37243731
case INS_paciaz:
3732+
case INS_pacib1716:
3733+
case INS_pacibsp:
3734+
case INS_pacibz:
37253735
case INS_xpaclri:
37263736
assert(fmt == IF_PC_0A);
37273737
break;
37283738

3739+
case INS_retaa:
3740+
case INS_retab:
3741+
assert(fmt == IF_BR_0A);
3742+
break;
3743+
37293744
default:
37303745
assert(fmt == IF_SN_0A);
37313746
break;
@@ -3796,7 +3811,9 @@ void emitter::emitIns_R(instruction ins, emitAttr attr, regNumber reg, insOpts o
37963811

37973812
case INS_dczva:
37983813
case INS_autiza:
3814+
case INS_autizb:
37993815
case INS_paciza:
3816+
case INS_pacizb:
38003817
case INS_xpacd:
38013818
case INS_xpaci:
38023819
assert(isGeneralRegister(reg));
@@ -5104,7 +5121,9 @@ void emitter::emitIns_R_R(instruction ins,
51045121
break;
51055122

51065123
case INS_autia:
5124+
case INS_autib:
51075125
case INS_pacia:
5126+
case INS_pacib:
51085127
{
51095128
assert(insOptsNone(opt));
51105129
assert(isValidGeneralDatasize(size));
@@ -11359,6 +11378,13 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
1135911378
sz = sizeof(instrDescJmp);
1136011379
break;
1136111380

11381+
case IF_BR_0A: // BR_0A ................ ................
11382+
assert(insOptsNone(id->idInsOpt()));
11383+
assert((ins == INS_retaa) || (ins == INS_retab));
11384+
code = emitInsCode(ins, fmt);
11385+
dst += emitOutput_Instr(dst, code);
11386+
break;
11387+
1136211388
case IF_BR_1A: // BR_1A ................ ......nnnnn..... Rn
1136311389
assert(insOptsNone(id->idInsOpt()));
1136411390
assert((ins == INS_ret) || (ins == INS_br));
@@ -13736,6 +13762,10 @@ void emitter::emitDispInsHelp(
1373613762
}
1373713763
break;
1373813764

13765+
case IF_BR_0A: // BR_0A ................ ................
13766+
assert(insOptsNone(id->idInsOpt()));
13767+
break;
13768+
1373913769
case IF_BR_1A: // BR_1A ................ ......nnnnn..... Rn
1374013770
assert(insOptsNone(id->idInsOpt()));
1374113771
emitDispReg(id->idReg1(), size, false);
@@ -15508,6 +15538,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
1550815538
// otherwise we should have a br_tail instruction
1550915539
assert(ins == INS_br_tail);
1551015540
FALLTHROUGH;
15541+
case IF_BR_0A: // retaa, retab
1551115542
case IF_BR_1A: // ret, br
1551215543
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
1551315544
result.insLatency = PERFSCORE_LATENCY_1C;
@@ -16208,9 +16239,9 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
1620816239
}
1620916240
break;
1621016241

16211-
case IF_PC_0A: // autia1716, autiasp, autiaz, pacia1716, paciasp, paciaz, xpaclri
16212-
case IF_PC_1A: // autiza, paciza, xpacd, xpaci
16213-
case IF_PC_2A: // autia, pacia
16242+
case IF_PC_0A:
16243+
case IF_PC_1A:
16244+
case IF_PC_2A:
1621416245
switch (ins)
1621516246
{
1621616247
case INS_xpacd:

‎src/coreclr/jit/emitfmtsarm64.h‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ IF_DEF(BI_0B, IS_NONE, JMP) // BI_0B ......iiiiiiiiii iiiiiiiiiii.....
129129
IF_DEF(BI_0C, IS_NONE, CALL) // BI_0C ......iiiiiiiiii iiiiiiiiiiiiiiii simm26:00 bl
130130
IF_DEF(BI_1A, IS_NONE, JMP) // BI_1A X.......iiiiiiii iiiiiiiiiiittttt Rt simm19:00 cbz cbnz
131131
IF_DEF(BI_1B, IS_NONE, JMP) // BI_1B B.......bbbbbiii iiiiiiiiiiittttt Rt imm6 simm14:00 tbz tbnz
132+
IF_DEF(BR_0A, IS_NONE, CALL) // BR_0A ................ ................ retaa retab
132133
IF_DEF(BR_1A, IS_NONE, CALL) // BR_1A ................ ......nnnnn..... Rn ret
133134
IF_DEF(BR_1B, IS_NONE, CALL) // BR_1B ................ ......nnnnn..... Rn br blr
134135

@@ -232,9 +233,9 @@ IF_DEF(SI_0A, IS_NONE, NONE) // SI_0A ...........iiiii iiiiiiiiiii.....
232233
IF_DEF(SI_0B, IS_NONE, NONE) // SI_0B ................ ....bbbb........ imm4 - barrier
233234

234235
// Pointer Authentication (PAC) groups
235-
IF_DEF(PC_0A, IS_NONE, NONE) // PC_0A ................ ................ (autia1716, autiasp, autiaz, pacia1716, paciasp, paciaz, xpaclri)
236-
IF_DEF(PC_1A, IS_NONE, NONE) // PC_1A ................ ...........ddddd Rd (autiza, paciza, xpacd, xpaci)
237-
IF_DEF(PC_2A, IS_NONE, NONE) // PC_2A X........X...... ......nnnnnddddd Rd Rn (autia, pacia)
236+
IF_DEF(PC_0A, IS_NONE, NONE) // PC_0A ................ ................ (autia1716, autiasp, autib1716, autibsp, autibz, autiaz, pacia1716, paciasp, pacib1716, pacibsp, pacibz, paciaz, xpaclri)
237+
IF_DEF(PC_1A, IS_NONE, NONE) // PC_1A ................ ...........ddddd Rd (autiza, autizb, paciza, pacizb, xpacd, xpaci)
238+
IF_DEF(PC_2A, IS_NONE, NONE) // PC_2A X........X...... ......nnnnnddddd Rd Rn (autia, autib, pacia, pacib)
238239

239240
IF_DEF(SR_1A, IS_NONE, NONE) // SR_1A ................ ...........ttttt Rt (dc zva, mrs)
240241

‎src/coreclr/jit/instrsarm64.h‎

Lines changed: 37 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1314,6 +1314,12 @@ INST1(blr, "blr", 0, IF_BR_1B, 0xD63F0000)
13141314
INST1(ret, "ret", 0, IF_BR_1A, 0xD65F0000)
13151315
// ret Rn BR_1A 1101011001011111 000000nnnnn00000 D65F 0000
13161316

1317+
INST1(retaa, "retaa", 0, IF_BR_0A, 0xD65F0BFF)
1318+
// retaa BR_0A 1101011001011111 0000101111111111 D65F 0BFF
1319+
1320+
INST1(retab, "retab", 0, IF_BR_0A, 0xD65F0FFF)
1321+
// retab BR_0A 1101011001011111 0000111111111111 D65F 0FFF
1322+
13171323
INST1(beq, "beq", 0, IF_BI_0B, 0x54000000)
13181324
// beq simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00000 5400 0000 simm19:00
13191325

@@ -1593,15 +1599,33 @@ INST1(autia1716, "autia1716", 0, IF_PC_0A, 0xD503219F)
15931599
INST1(autiasp, "autiasp", 0, IF_PC_0A, 0xD50323BF)
15941600
// autiasp PC_0A 1101010100000011 0010001110111111 D503 23BF
15951601

1602+
INST1(autib1716, "autib1716", 0, IF_PC_0A, 0xD50321DF)
1603+
// autib1716 PC_0A 1101010100000011 0010000111011111 D503 21DF
1604+
1605+
INST1(autibsp, "autibsp", 0, IF_PC_0A, 0xD50323FF)
1606+
// autibsp PC_0A 1101010100000011 0010001111111111 D503 23FF
1607+
1608+
INST1(autibz, "autibz", 0, IF_PC_0A, 0xD50323DF)
1609+
// autibz PC_0A 1101010100000011 0010001111011111 D503 23DF
1610+
15961611
INST1(autiaz, "autiaz", 0, IF_PC_0A, 0xD503239F)
15971612
// autiaz PC_0A 1101010100000011 0010001110011111 D503 239F
15981613

1599-
INST1(pacia1716, "pacia1716 ", 0, IF_PC_0A, 0xD503211F)
1614+
INST1(pacia1716, "pacia1716", 0, IF_PC_0A, 0xD503211F)
16001615
// pacia1716 PC_0A 1101010100000011 0010000100011111 D503 211F
16011616

16021617
INST1(paciasp, "paciasp", 0, IF_PC_0A, 0xD503233F)
16031618
// paciasp PC_0A 1101010100000011 0010001100111111 D503 233F
16041619

1620+
INST1(pacib1716, "pacib1716", 0, IF_PC_0A, 0xD503215F)
1621+
// pacib1716 PC_0A 1101010100000011 0010000101011111 D503 215F
1622+
1623+
INST1(pacibsp, "pacibsp", 0, IF_PC_0A, 0xD503237F)
1624+
// pacibsp PC_0A 1101010100000011 0010001101111111 D503 237F
1625+
1626+
INST1(pacibz, "pacibz", 0, IF_PC_0A, 0xD503235F)
1627+
// pacibz PC_0A 1101010100000011 0010001101011111 D503 235F
1628+
16051629
INST1(paciaz, "paciaz", 0, IF_PC_0A, 0xD503231F)
16061630
// paciaz PC_0A 1101010100000011 0010001100011111 D503 231F
16071631

@@ -1611,9 +1635,15 @@ INST1(xpaclri, "xpaclri", 0, IF_PC_0A, 0xD50320FF)
16111635
INST1(autiza, "autiza", 0, IF_PC_1A, 0xDAC133E0)
16121636
// autiza Rd PC_1A 1101101011000001 0001000000000000 DAC1 33E0
16131637

1638+
INST1(autizb, "autizb", 0, IF_PC_1A, 0xDAC137E0)
1639+
// autizb Rd PC_1A 1101101011000001 00110111111ddddd DAC1 37E0
1640+
16141641
INST1(paciza, "paciza", 0, IF_PC_1A, 0xDAC123E0)
16151642
// paciza Rd PC_1A 1101101011000001 00000011111ddddd DAC1 23E0
16161643

1644+
INST1(pacizb, "pacizb", 0, IF_PC_1A, 0xDAC127E0)
1645+
// pacizb Rd PC_1A 1101101011000001 00100111111ddddd DAC1 27E0
1646+
16171647
INST1(xpacd, "xpacd", 0, IF_PC_1A, 0xDAC147E0)
16181648
// xpacd Rd PC_0A 1101101011000001 0100011111100000 DAC1 47E0
16191649

@@ -1623,9 +1653,15 @@ INST1(xpaci, "xpaci", 0, IF_PC_1A, 0xDAC143E0)
16231653
INST1(autia, "autia", 0, IF_PC_2A, 0xDAC11000)
16241654
// autia Rd,Rn PC_2A 1101101011000001 00110011111ddddd DAC1 1000
16251655

1656+
INST1(autib, "autib", 0, IF_PC_2A, 0xDAC11400)
1657+
// autib Rd,Rn PC_2A 1101101011000001 000101nnnnnddddd DAC1 1400
1658+
16261659
INST1(pacia, "pacia", 0, IF_PC_2A, 0xDAC10000)
16271660
// pacia Rd,Rn PC_2A 1101101011000001 000000nnnnnddddd DAC1 0000
16281661

1662+
INST1(pacib, "pacib", 0, IF_PC_2A, 0xDAC10400)
1663+
// pacib Rd,Rn PC_2A 1101101011000001 000001nnnnnddddd DAC1 0400
1664+
16291665
INST1(nop, "nop", 0, IF_SN_0A, 0xD503201F)
16301666
// nop SN_0A 1101010100000011 0010000000011111 D503 201F
16311667

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