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Expand file tree Collapse file tree Original file line number Diff line number Diff line change @@ -183,7 +183,7 @@ The Pure64 information table is located at `0x0000000000005000` and ends at `0x0
183183<tr ><th >Memory Address</th ><th >Variable Size</th ><th >Name</th ><th >Description</th ></tr >
184184<tr ><td >0x5000</td ><td >64-bit</td ><td >ACPI</td ><td >Address of the ACPI tables</td ></tr >
185185<tr ><td >0x5008</td ><td >32-bit</td ><td >CPU_BSP_ID</td ><td >APIC ID of the BSP</td ></tr >
186- <tr ><td >0x5010 </td ><td >16-bit </td ><td >CPU_SPEED </td ><td >Speed of the CPUs in MegaHertz (< a href = " http://en.wikipedia.org/wiki/Hertz " >MHz</ a >) </td ></tr >
186+ <tr ><td >0x500C - 0x5011 </td ><td >& nbsp ; </td ><td >& nbsp ; </td ><td >For future use </td ></tr >
187187<tr ><td >0x5012</td ><td >16-bit</td ><td >CPU_CORES_ACTIVE</td ><td >The number of CPU cores that were activated in the system</td ></tr >
188188<tr ><td >0x5014</td ><td >16-bit</td ><td >CPU_CORES_DETECT</td ><td >The number of CPU cores that were detected in the system</td ></tr >
189189<tr ><td >0x5016</td ><td >8-bit</td ><td >CPU_MEM_PHYSICAL</td ><td >The number of bits that are valid for a physical address</td ></tr >
Original file line number Diff line number Diff line change 99init_smp:
1010 ; Check if we want the AP's to be enabled.. if not then skip to end
1111 cmp byte [ cfg_smpinit ], 1 ; Check if SMP should be enabled
12- jne noMP ; If not then skip SMP init
12+ jne init_smp_done ; If not then skip SMP init
1313
14+ ; Check if multiple CPUs were detected via the ACPI tables
15+ xor ecx , ecx
16+ mov cx , [ p_cpu_detected ]
17+ cmp cx , 1
18+ je init_smp_done ; Only 1 CPU detected, skip SMP init
1419 mov edx , [ p_BSP ] ; Get the BSP APIC ID
1520 mov esi , IM_DetectedCoreIDs ; List of 32-bit APIC IDs
1621 xor eax , eax
17- xor ecx , ecx
18- mov cx , [ p_cpu_detected ]
1922smp_send_INIT:
2023 cmp cx , 0
2124 je smp_send_INIT_done
@@ -115,24 +118,7 @@ smp_send_SIPI_done:
115118 mov eax , 10000 ; 10000 microseconds (10ms)
116119 call timer_delay
117120
118- noMP:
119-
120- ; ; Calculate base speed of CPU
121- ; cpuid
122- ; xor edx, edx
123- ; xor eax, eax
124- ; rdtsc
125- ; push rax
126- ; mov rax, 1024 ; 1024 microseconds (1ms)
127- ; call timer_delay
128- ; rdtsc
129- ; pop rdx
130- ; sub rax, rdx
131- ; xor edx, edx
132- ; mov rcx, 1024
133- ; div rcx
134- ; mov [p_cpu_speed], ax
135-
121+ init_smp_done:
136122 ret
137123
138124
Original file line number Diff line number Diff line change @@ -784,9 +784,7 @@ pde_end:
784784 mov eax , [ p_BSP ]
785785 stosd
786786
787- mov di , 0x5010
788- mov ax , [ p_cpu_speed ]
789- stosw
787+ mov di , 0x5012
790788 mov ax , [ p_cpu_activated ]
791789 stosw
792790 mov ax , [ p_cpu_detected ]
Original file line number Diff line number Diff line change @@ -50,7 +50,6 @@ p_mem_amount: equ SystemVariables + 0x84 ; in MiB
5050p_HPET_Frequency: equ SystemVariables + 0x88
5151
5252; DW - Starting at offset 0x100, increments by 2
53- p_cpu_speed: equ SystemVariables + 0x100
5453p_cpu_activated: equ SystemVariables + 0x102
5554p_cpu_detected: equ SystemVariables + 0x104
5655p_PCIECount: equ SystemVariables + 0x106
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