From f6e7bbb12a128360a86e1026b5539253e74a7dc6 Mon Sep 17 00:00:00 2001 From: Selvam Sathappan Periakaruppan Date: Tue, 14 Apr 2026 23:31:51 +0530 Subject: [PATCH 1/6] plat-qcom: Add support for diagnostic ring buffer On Qualcomm production devices the UART is typically disabled or shared with the non-secure world, so it cannot be used as a dedicated console for OP-TEE trace output. Introduce a diagnostic ring buffer driver that records OP-TEE log data in IMEM. Because IMEM contents are preserved across a warm reset, the captured trace can be retrieved out of band by an external reader for debug and post-mortem use. The following interface is exposed: - qcom_diag_log_init(): initializes the buffer header and the write-only circular log region in IMEM. Logging is suppressed when the SoC is in DLOAD (download) mode, as indicated by the TCSR boot-misc register. - qcom_diag_log_puts(): appends a string to the circular buffer. On overflow the buffer wraps in place and a saturating wrap counter records the number of overruns. Signed-off-by: Selvam Sathappan Periakaruppan Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Sumit Garg --- core/arch/arm/plat-qcom/diag_log.c | 133 +++++++++++++++++++++++++++++ core/arch/arm/plat-qcom/diag_log.h | 17 ++++ core/arch/arm/plat-qcom/sub.mk | 2 + 3 files changed, 152 insertions(+) create mode 100644 core/arch/arm/plat-qcom/diag_log.c create mode 100644 core/arch/arm/plat-qcom/diag_log.h diff --git a/core/arch/arm/plat-qcom/diag_log.c b/core/arch/arm/plat-qcom/diag_log.c new file mode 100644 index 00000000000..d042ef3948b --- /dev/null +++ b/core/arch/arm/plat-qcom/diag_log.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "diag_log.h" + +register_phys_mem_pgdir(MEM_AREA_IO_SEC, DIAG_BASE, DIAG_SIZE); +register_phys_mem_pgdir(MEM_AREA_IO_SEC, + (DIAG_LOG_START_INFO & ~SMALL_PAGE_MASK), + SMALL_PAGE_SIZE); +register_phys_mem_pgdir(MEM_AREA_IO_SEC, + (TCSR_BOOT_MISC_DETECT & ~SMALL_PAGE_MASK), + SMALL_PAGE_SIZE); + +#define DIAG_VERSION_V1 1 +#define DIAG_MAGIC_INIT 0x47414944 +#define DIAG_MAGIC_FAILED 0xDEADBEEF +#define DIAG_MAGIC_DLOAD 0xD15AB1ED +#define DLOAD_MAGIC_COOKIE 0x10 + +struct diag_hdr { + uint32_t version; + uint32_t magic; +}; + +struct diag_conf { + uint32_t buf_offset; + uint32_t buf_size; +}; + +struct circ_wo_buf { + uint32_t wrap; + uint32_t head; + uint8_t buf[]; +}; + +struct diag { + struct diag_hdr hdr; + struct diag_conf conf; + struct circ_wo_buf wo_cbuf; +}; + +static struct diag *global_diag; + +static struct diag *get_diag_region(void) +{ + struct diag *diag = NULL; + uint32_t *tcsr_reg = NULL; + + tcsr_reg = phys_to_virt(TCSR_BOOT_MISC_DETECT, MEM_AREA_IO_SEC, + sizeof(uint32_t)); + diag = phys_to_virt(DIAG_BASE, MEM_AREA_IO_SEC, DIAG_SIZE); + + if (!tcsr_reg || !diag) { + EMSG("DIAG: Failed to map regions"); + return NULL; + } + + if (io_read32((vaddr_t)tcsr_reg) == DLOAD_MAGIC_COOKIE) { + diag->hdr.magic = DIAG_MAGIC_DLOAD; + dsb(); + return NULL; + } + + return diag; +} + +void qcom_diag_log_init(void) +{ + struct diag *diag = NULL; + uint32_t *diag_info_addr = NULL; + + if (!IS_ENABLED(CFG_QCOM_DIAG_LOG)) { + IMSG("DIAG: Feature not available"); + return; + } + + diag = get_diag_region(); + if (!diag) + return; + + memset(diag, 0, DIAG_SIZE); + + diag->hdr.version = DIAG_VERSION_V1; + diag->hdr.magic = DIAG_MAGIC_INIT; + diag->conf.buf_offset = offsetof(struct diag, wo_cbuf.buf); + diag->conf.buf_size = ROUNDDOWN2(DIAG_SIZE - diag->conf.buf_offset, 16); + + if (diag->conf.buf_offset >= DIAG_SIZE || diag->conf.buf_size == 0) { + EMSG("DIAG: Invalid buffer configuration (offset=%u, size=%u)", + diag->conf.buf_offset, diag->conf.buf_size); + diag->hdr.magic = DIAG_MAGIC_FAILED; + return; + } + + diag_info_addr = phys_to_virt(DIAG_LOG_START_INFO, MEM_AREA_IO_SEC, + 2 * sizeof(uint32_t)); + if (diag_info_addr) { + io_write32((vaddr_t)&diag_info_addr[0], DIAG_BASE); + io_write32((vaddr_t)&diag_info_addr[1], DIAG_SIZE); + } + + dsb(); + + global_diag = diag; +} + +void qcom_diag_log_puts(const char *str) +{ + struct diag *diag = global_diag; + const char *p = NULL; + + if (!diag || !str) + return; + + for (p = str; *p; p++) { + diag->wo_cbuf.buf[diag->wo_cbuf.head++] = *p; + if (diag->wo_cbuf.head >= diag->conf.buf_size) { + diag->wo_cbuf.head = 0; + if (diag->wo_cbuf.wrap < UINT32_MAX) + diag->wo_cbuf.wrap++; + } + } +} diff --git a/core/arch/arm/plat-qcom/diag_log.h b/core/arch/arm/plat-qcom/diag_log.h new file mode 100644 index 00000000000..609f0977e7b --- /dev/null +++ b/core/arch/arm/plat-qcom/diag_log.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __DIAG_LOG_H +#define __DIAG_LOG_H + +#include +#include +#include +#include + +void qcom_diag_log_init(void); +void qcom_diag_log_puts(const char *str); + +#endif /* __DIAG_LOG_H */ diff --git a/core/arch/arm/plat-qcom/sub.mk b/core/arch/arm/plat-qcom/sub.mk index 81c0195fd80..51009dad249 100644 --- a/core/arch/arm/plat-qcom/sub.mk +++ b/core/arch/arm/plat-qcom/sub.mk @@ -5,3 +5,5 @@ srcs-y += main.c $(eval $(call cfg-depends-all,CFG_QCOM_QFPROM_FUSEPROV,CFG_QCOM_QFPROM)) subdirs-$(CFG_QCOM_QFPROM_FUSEPROV) += provision + +srcs-y += diag_log.c From e98a67471169c4ddddf33a9bfc7f1fb0222a4943 Mon Sep 17 00:00:00 2001 From: Selvam Sathappan Periakaruppan Date: Fri, 12 Jun 2026 00:42:44 +0530 Subject: [PATCH 2/6] plat-qcom: Wire diagnostic ring buffer into OP-TEE trace path The diagnostic ring buffer added in the previous commit is only populated when something writes to it. Hook it into the OP-TEE trace subsystem so that every trace line emitted by the core is also captured in IMEM. Override the two weak trace hooks provided by the core: - plat_trace_init() initializes the ring buffer early during console setup, before any trace output is emitted. - plat_trace_ext_puts() forwards each trace line to the ring buffer in addition to the regular console output. With this in place, OP-TEE log output is preserved in IMEM on all Qualcomm platforms that enable CFG_QCOM_DIAG_LOG, and can be read out of band by an external tool for debug and post-mortem use. Signed-off-by: Selvam Sathappan Periakaruppan Reviewed-by: Sumit Garg Reviewed-by: Jorge Ramirez-Ortiz --- core/arch/arm/plat-qcom/main.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/core/arch/arm/plat-qcom/main.c b/core/arch/arm/plat-qcom/main.c index ed7a94e186e..30e35df7eeb 100644 --- a/core/arch/arm/plat-qcom/main.c +++ b/core/arch/arm/plat-qcom/main.c @@ -11,6 +11,8 @@ #include #include +#include "diag_log.h" + /* * Register the physical memory area for peripherals etc. Here we are * registering the UART console. @@ -32,6 +34,16 @@ register_ddr(DRAM1_BASE, DRAM1_SIZE); static struct qcom_geni_uart_data console_data; +void plat_trace_ext_puts(const char *str) +{ + qcom_diag_log_puts(str); +} + +void plat_trace_init(void) +{ + qcom_diag_log_init(); +} + void plat_console_init(void) { qcom_geni_uart_init(&console_data, GENI_UART_REG_BASE); From 33a847e87896b6dc2adba8c15fabf3d301bbe8ac Mon Sep 17 00:00:00 2001 From: Selvam Sathappan Periakaruppan Date: Fri, 12 Jun 2026 00:48:08 +0530 Subject: [PATCH 3/6] plat-qcom: bobcat: Enable diagnostic ring buffer on ipq96xx and ipq52xx Add the platform configuration required by the diagnostic ring buffer on the bobcat architecture, including the buffer layout shared by all bobcat targets and the IMEM base and size for ipq96xx and ipq52xx. Default CFG_QCOM_DIAG_LOG to CFG_TEE_CORE_DEBUG on both targets so that the buffer is enabled on debug builds. Signed-off-by: Selvam Sathappan Periakaruppan Reviewed-by: Sumit Garg Reviewed-by: Jorge Ramirez-Ortiz --- core/arch/arm/plat-qcom/bobcat/arch_config.h | 9 +++++---- core/arch/arm/plat-qcom/bobcat/ipq52xx/target.mk | 2 ++ core/arch/arm/plat-qcom/bobcat/ipq52xx/target_config.h | 3 +++ core/arch/arm/plat-qcom/bobcat/ipq96xx/target.mk | 2 ++ core/arch/arm/plat-qcom/bobcat/ipq96xx/target_config.h | 3 +++ 5 files changed, 15 insertions(+), 4 deletions(-) diff --git a/core/arch/arm/plat-qcom/bobcat/arch_config.h b/core/arch/arm/plat-qcom/bobcat/arch_config.h index 5f44142225a..937d7ae5a97 100644 --- a/core/arch/arm/plat-qcom/bobcat/arch_config.h +++ b/core/arch/arm/plat-qcom/bobcat/arch_config.h @@ -6,9 +6,10 @@ #ifndef ARCH_CONFIG_H #define ARCH_CONFIG_H -/* - * Arch specific configs will be added here in future as more - * drivers/services are enabled for bobcat arch. - */ +#define IMEM_DIAG_OFFSET UL(0x730) +#define DIAG_SIZE UL(0x6000) +#define DIAG_BASE UL(0x8608000) +#define DIAG_LOG_START_INFO (IMEM_BASE + IMEM_DIAG_OFFSET) +#define TCSR_BOOT_MISC_DETECT UL(0x195C100) #endif /* ARCH_CONFIG_H */ diff --git a/core/arch/arm/plat-qcom/bobcat/ipq52xx/target.mk b/core/arch/arm/plat-qcom/bobcat/ipq52xx/target.mk index 562d5ed3389..4a226d28b40 100644 --- a/core/arch/arm/plat-qcom/bobcat/ipq52xx/target.mk +++ b/core/arch/arm/plat-qcom/bobcat/ipq52xx/target.mk @@ -1,6 +1,8 @@ $(call force,CFG_TEE_CORE_NB_CORE,4) CFG_NUM_THREADS ?= 4 +CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG) + CFG_TZDRAM_START ?= 0x87D80000 CFG_TZDRAM_SIZE ?= 0x280000 CFG_TEE_RAM_VA_SIZE ?= 0x280000 diff --git a/core/arch/arm/plat-qcom/bobcat/ipq52xx/target_config.h b/core/arch/arm/plat-qcom/bobcat/ipq52xx/target_config.h index d0e5595a19e..17008a0a0d0 100644 --- a/core/arch/arm/plat-qcom/bobcat/ipq52xx/target_config.h +++ b/core/arch/arm/plat-qcom/bobcat/ipq52xx/target_config.h @@ -17,4 +17,7 @@ #define GICC_BASE UL(0xB002000) #define GICD_PIDR2 UL(0xFD8) +#define IMEM_BASE UL(0x8600000) +#define IMEM_SIZE UL(0x18000) + #endif /* TARGET_CONFIG_H */ diff --git a/core/arch/arm/plat-qcom/bobcat/ipq96xx/target.mk b/core/arch/arm/plat-qcom/bobcat/ipq96xx/target.mk index 087fbd5baae..b170b60a783 100644 --- a/core/arch/arm/plat-qcom/bobcat/ipq96xx/target.mk +++ b/core/arch/arm/plat-qcom/bobcat/ipq96xx/target.mk @@ -4,6 +4,8 @@ CFG_NUM_THREADS ?= 5 $(call force,CFG_ARM_GICV3,y) +CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG) + CFG_TZDRAM_START ?= 0x8A680000 CFG_TZDRAM_SIZE ?= 0x280000 CFG_TEE_RAM_VA_SIZE ?= 0x280000 diff --git a/core/arch/arm/plat-qcom/bobcat/ipq96xx/target_config.h b/core/arch/arm/plat-qcom/bobcat/ipq96xx/target_config.h index 5e914c9b240..b3eb10732b8 100644 --- a/core/arch/arm/plat-qcom/bobcat/ipq96xx/target_config.h +++ b/core/arch/arm/plat-qcom/bobcat/ipq96xx/target_config.h @@ -16,4 +16,7 @@ #define GICD_BASE UL(0xF200000) #define GICR_BASE UL(0xF240000) +#define IMEM_BASE UL(0x8600000) +#define IMEM_SIZE UL(0x20000) + #endif /* TARGET_CONFIG_H */ From aaee963ee5812ba10d9b19a0eaa9e5e6cab474f1 Mon Sep 17 00:00:00 2001 From: Selvam Sathappan Periakaruppan Date: Fri, 12 Jun 2026 00:48:39 +0530 Subject: [PATCH 4/6] plat-qcom: hoya: Enable diagnostic ring buffer on kodiak and lemans Add the platform configuration required by the diagnostic ring buffer on the hoya architecture, including the buffer layout shared by all hoya targets and the IMEM base and size for kodiak and lemans. Default CFG_QCOM_DIAG_LOG to CFG_TEE_CORE_DEBUG on both targets so that the buffer is enabled on debug builds. Signed-off-by: Selvam Sathappan Periakaruppan Reviewed-by: Sumit Garg Reviewed-by: Jorge Ramirez-Ortiz --- core/arch/arm/plat-qcom/hoya/arch_config.h | 6 ++++++ core/arch/arm/plat-qcom/hoya/kodiak/target.mk | 2 ++ core/arch/arm/plat-qcom/hoya/kodiak/target_config.h | 4 ++++ core/arch/arm/plat-qcom/hoya/lemans/target.mk | 2 ++ core/arch/arm/plat-qcom/hoya/lemans/target_config.h | 4 ++++ 5 files changed, 18 insertions(+) diff --git a/core/arch/arm/plat-qcom/hoya/arch_config.h b/core/arch/arm/plat-qcom/hoya/arch_config.h index b0459613b85..8848825cb41 100644 --- a/core/arch/arm/plat-qcom/hoya/arch_config.h +++ b/core/arch/arm/plat-qcom/hoya/arch_config.h @@ -25,4 +25,10 @@ #define TCSR_MUTEX_BASE UL(0x01F40000) #define TCSR_MUTEX_SIZE UL(0x40000) +#define IMEM_DIAG_OFFSET UL(0x720) +#define DIAG_SIZE UL(0x3000) +#define DIAG_BASE (IMEM_BASE + IMEM_SIZE - DIAG_SIZE) +#define DIAG_LOG_START_INFO (IMEM_BASE + IMEM_DIAG_OFFSET) +#define TCSR_BOOT_MISC_DETECT UL(0x1FD3000) + #endif /* ARCH_CONFIG_H */ diff --git a/core/arch/arm/plat-qcom/hoya/kodiak/target.mk b/core/arch/arm/plat-qcom/hoya/kodiak/target.mk index 3f090c09b3b..a32c35fc6ba 100644 --- a/core/arch/arm/plat-qcom/hoya/kodiak/target.mk +++ b/core/arch/arm/plat-qcom/hoya/kodiak/target.mk @@ -1,6 +1,8 @@ CFG_DRIVERS_CLK ?= y CFG_DRIVERS_QCOM_CLK ?= y +CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG) + CFG_QCOM_QFPROM_FUSEPROV ?= $(if $(filter y,$(CFG_INSECURE)),n,y) _qcom_fuseprov_deps = $(if $(filter y,$(CFG_QCOM_QFPROM_FUSEPROV)),y,n) diff --git a/core/arch/arm/plat-qcom/hoya/kodiak/target_config.h b/core/arch/arm/plat-qcom/hoya/kodiak/target_config.h index 4696716ed0f..77354f49ecb 100644 --- a/core/arch/arm/plat-qcom/hoya/kodiak/target_config.h +++ b/core/arch/arm/plat-qcom/hoya/kodiak/target_config.h @@ -26,6 +26,10 @@ #define GENI_UART_REG_BASE UL(0x994000) +/* IMEM and Diagnostic buffer */ +#define IMEM_BASE UL(0x14680000) +#define IMEM_SIZE UL(0x19000) + #define WPSS_BASE UL(0x8a00000) #define WPSS_SIZE UL(0x200000) #define TURING_BASE UL(0x09800000) diff --git a/core/arch/arm/plat-qcom/hoya/lemans/target.mk b/core/arch/arm/plat-qcom/hoya/lemans/target.mk index fba5dc6c003..68c31771e6a 100644 --- a/core/arch/arm/plat-qcom/hoya/lemans/target.mk +++ b/core/arch/arm/plat-qcom/hoya/lemans/target.mk @@ -1,6 +1,8 @@ CFG_DRIVERS_CLK ?= y CFG_DRIVERS_QCOM_CLK ?= y +CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG) + CFG_QCOM_QFPROM_FUSEPROV ?= $(if $(filter y,$(CFG_INSECURE)),n,y) _qcom_fuseprov_deps = $(if $(filter y,$(CFG_QCOM_QFPROM_FUSEPROV)),y,n) diff --git a/core/arch/arm/plat-qcom/hoya/lemans/target_config.h b/core/arch/arm/plat-qcom/hoya/lemans/target_config.h index 6431bfa21f0..fda23747871 100644 --- a/core/arch/arm/plat-qcom/hoya/lemans/target_config.h +++ b/core/arch/arm/plat-qcom/hoya/lemans/target_config.h @@ -26,4 +26,8 @@ #define GENI_UART_REG_BASE UL(0xa8c000) +/* IMEM and Diagnostic buffer */ +#define IMEM_BASE UL(0x14680000) +#define IMEM_SIZE UL(0x32000) + #endif /* TARGET_CONFIG_H */ From 660107031db3c071f73a476d611b42cd3b6a0978 Mon Sep 17 00:00:00 2001 From: Selvam Sathappan Periakaruppan Date: Wed, 17 Jun 2026 00:33:44 +0530 Subject: [PATCH 5/6] ci: qcom: add lemans diag log and fuse provisioning builds Add PLATFORM=qcom-lemans builds that enable the diagnostic log and the QFPROM fuse provisioning drivers so that both code paths are covered by CI. CFG_QCOM_DIAG_LOG=y builds the diagnostic ring buffer logging driver. CFG_QFPROM_PROGRAMMING=y CFG_QCOM_QFPROM_FUSEPROV=y builds the fuse provisioning path, which also pulls in the CMD_DB, RPMH client and QFPROM drivers through its dependencies. Signed-off-by: Selvam Sathappan Periakaruppan Reviewed-by: Sumit Garg Reviewed-by: Jorge Ramirez-Ortiz --- .github/workflows/ci.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 66d735c8421..37c001f54d3 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -213,6 +213,7 @@ jobs: make_commands: | _make PLATFORM=qcom-kodiak _make PLATFORM=qcom-lemans + _make PLATFORM=qcom-lemans CFG_QCOM_DIAG_LOG=y CFG_QFPROM_PROGRAMMING=y CFG_QCOM_QFPROM_FUSEPROV=y _make PLATFORM=qcom-ipq96xx _make PLATFORM=qcom-ipq52xx - name: arm rockchip From 611de507921a48ef107e53f555ec8b4cc6f3eced Mon Sep 17 00:00:00 2001 From: Selvam Sathappan Periakaruppan Date: Fri, 19 Jun 2026 12:06:31 +0530 Subject: [PATCH 6/6] plat-qcom: hoya: enforce QFPROM fuse provisioning dependencies The QFPROM fuse provisioning feature cannot operate without the CMD_DB, RPMH client and QFPROM drivers. Previously these were pulled in as soft defaults (?=) derived from CFG_QCOM_QFPROM_FUSEPROV, and consistency was separately validated with cfg-depends-all checks in the driver and platform sub.mk files. Centralise this in the Hoya kodiak and lemans targets: when CFG_QCOM_QFPROM_FUSEPROV is enabled, force CFG_QCOM_CMD_DB, CFG_QCOM_RPMH_CLIENT and CFG_QCOM_QFPROM on. This guarantees the dependencies are always satisfied and makes the redundant cfg-depends-all checks in core/drivers/qcom/sub.mk and core/arch/arm/plat-qcom/sub.mk unnecessary, so drop them. Also define CFG_INSECURE early in the Qualcomm conf.mk so the CFG_INSECURE-based default of CFG_QCOM_QFPROM_FUSEPROV is evaluated correctly (mk/config.mk is included after the platform conf.mk from core/core.mk). Signed-off-by: Selvam Sathappan Periakaruppan Reviewed-by: Jorge Ramirez-Ortiz Reviewed-by: Sumit Garg --- core/arch/arm/plat-qcom/conf.mk | 7 +++++++ core/arch/arm/plat-qcom/hoya/kodiak/target.mk | 17 ++++++++++------- core/arch/arm/plat-qcom/hoya/lemans/target.mk | 13 ++++++++----- core/arch/arm/plat-qcom/sub.mk | 1 - core/drivers/qcom/sub.mk | 2 -- 5 files changed, 25 insertions(+), 15 deletions(-) diff --git a/core/arch/arm/plat-qcom/conf.mk b/core/arch/arm/plat-qcom/conf.mk index 6a0808b543e..2218d0b9cd1 100644 --- a/core/arch/arm/plat-qcom/conf.mk +++ b/core/arch/arm/plat-qcom/conf.mk @@ -2,6 +2,13 @@ PLATFORM_FLAVOR ?= kodiak +# The default value CFG_INSECURE ?= y is assigned in mk/config.mk. +# But mk/config.mk is included after $(platform-dir)/conf.mk from +# core/core.mk. +# Since we are making decision based on CFG_INSECURE in this file +# so we need to set it early here also. +CFG_INSECURE ?= y + $(call force,CFG_GIC,y) $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) $(call force,CFG_ARM64_core,y) diff --git a/core/arch/arm/plat-qcom/hoya/kodiak/target.mk b/core/arch/arm/plat-qcom/hoya/kodiak/target.mk index a32c35fc6ba..b22ebfd0d5f 100644 --- a/core/arch/arm/plat-qcom/hoya/kodiak/target.mk +++ b/core/arch/arm/plat-qcom/hoya/kodiak/target.mk @@ -3,16 +3,19 @@ CFG_DRIVERS_QCOM_CLK ?= y CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG) -CFG_QCOM_QFPROM_FUSEPROV ?= $(if $(filter y,$(CFG_INSECURE)),n,y) - -_qcom_fuseprov_deps = $(if $(filter y,$(CFG_QCOM_QFPROM_FUSEPROV)),y,n) -CFG_QCOM_CMD_DB ?= $(_qcom_fuseprov_deps) -CFG_QCOM_RPMH_CLIENT ?= $(_qcom_fuseprov_deps) -CFG_QCOM_QFPROM ?= $(_qcom_fuseprov_deps) +ifneq ($(CFG_INSECURE),y) +CFG_QCOM_QFPROM_FUSEPROV ?= y +endif -CFG_QCOM_PAS_PTA ?= y +ifeq ($(CFG_QCOM_QFPROM_FUSEPROV),y) +$(call force,CFG_QCOM_CMD_DB,y) +$(call force,CFG_QCOM_RPMH_CLIENT,y) +$(call force,CFG_QCOM_QFPROM,y) # Kodiak requires MX voltage rail workaround for QFPROM fuse blowing $(call force,CFG_QFPROM_MX_RAIL_WA,y) +endif + +CFG_QCOM_PAS_PTA ?= y ifeq ($(CFG_QCOM_PAS_PTA),y) # Increase late mappings to cover all PAS resources diff --git a/core/arch/arm/plat-qcom/hoya/lemans/target.mk b/core/arch/arm/plat-qcom/hoya/lemans/target.mk index 68c31771e6a..c339ac0e5e3 100644 --- a/core/arch/arm/plat-qcom/hoya/lemans/target.mk +++ b/core/arch/arm/plat-qcom/hoya/lemans/target.mk @@ -3,9 +3,12 @@ CFG_DRIVERS_QCOM_CLK ?= y CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG) -CFG_QCOM_QFPROM_FUSEPROV ?= $(if $(filter y,$(CFG_INSECURE)),n,y) +ifneq ($(CFG_INSECURE),y) +CFG_QCOM_QFPROM_FUSEPROV ?= y +endif -_qcom_fuseprov_deps = $(if $(filter y,$(CFG_QCOM_QFPROM_FUSEPROV)),y,n) -CFG_QCOM_CMD_DB ?= $(_qcom_fuseprov_deps) -CFG_QCOM_RPMH_CLIENT ?= $(_qcom_fuseprov_deps) -CFG_QCOM_QFPROM ?= $(_qcom_fuseprov_deps) +ifeq ($(CFG_QCOM_QFPROM_FUSEPROV),y) +$(call force,CFG_QCOM_CMD_DB,y) +$(call force,CFG_QCOM_RPMH_CLIENT,y) +$(call force,CFG_QCOM_QFPROM,y) +endif diff --git a/core/arch/arm/plat-qcom/sub.mk b/core/arch/arm/plat-qcom/sub.mk index 51009dad249..894944c10d4 100644 --- a/core/arch/arm/plat-qcom/sub.mk +++ b/core/arch/arm/plat-qcom/sub.mk @@ -3,7 +3,6 @@ global-incdirs-y += $(QCOM_ARCH_FAMILY) global-incdirs-y += $(QCOM_ARCH_FAMILY)/$(PLATFORM_FLAVOR) srcs-y += main.c -$(eval $(call cfg-depends-all,CFG_QCOM_QFPROM_FUSEPROV,CFG_QCOM_QFPROM)) subdirs-$(CFG_QCOM_QFPROM_FUSEPROV) += provision srcs-y += diag_log.c diff --git a/core/drivers/qcom/sub.mk b/core/drivers/qcom/sub.mk index b7a931564c7..41d17c06cea 100644 --- a/core/drivers/qcom/sub.mk +++ b/core/drivers/qcom/sub.mk @@ -7,8 +7,6 @@ srcs-$(CFG_QCOM_RAMBLUR_PIMEM_V3) += ramblur/ramblur_pimem_v3.c srcs-$(CFG_QCOM_PRNG) += prng/prng.c -$(eval $(call cfg-depends-all,CFG_QCOM_QFPROM,CFG_QCOM_CMD_DB CFG_QCOM_RPMH_CLIENT)) -$(eval $(call cfg-depends-all,CFG_QCOM_RPMH_CLIENT,CFG_QCOM_CMD_DB)) subdirs-$(CFG_QCOM_CMD_DB) += cmd_db subdirs-$(CFG_QCOM_RPMH_CLIENT) += rpmh subdirs-$(CFG_QCOM_QFPROM) += qfprom