GPUModule.sv

module GPU(
	// Synchronization
	input logic Clock,
	input logic Reset,
	// VGA In-Out
	output logic hsync,
	output logic vsync,
	output logic[7:0] red,
	output logic[7:0] green,
	output logic[7:0] blue,
	output logic PxClock,
	output logic Blank,
	output logic Sync,
	// Video RAM Access
	output logic[19:0] RAMAddress,
	inout wire [15:0] RAMData,
	output logic RAMHB,
	output logic RAMLB,
	output logic RAMOE,
	output logic RAMWE,
	output logic RAMCE,
	// Bus Interface
	input logic [32:0] BusAddress,
	inout logic [32:0] BusData,
	input logic DataRead,
	input logic DataWrite
	);
	// Local Register Addresses:
	localparam LowerWordInstructionAddress  = 1024;
	localparam MidWordInstructionAddress	= 1025;
	localparam UpperWordInstructionAddress  = 1026;
	
	// VGA timings https://timetoexplore.net/blog/video-timings-vga-720p-1080p
	localparam HS_STA = 16;              // horizontal sync start
	localparam HS_END = 16 + 96;         // horizontal sync end
	localparam HA_STA = 16 + 96 + 48;    // horizontal active pixel start
	localparam VS_STA = 480 + 10;        // vertical sync start
	localparam VS_END = 480 + 10 + 2;    // vertical sync end
	localparam VA_END = 480;             // vertical active pixel end
	localparam LINE   = 800;             // complete line (pixels)
	localparam SCREEN = 525;             // complete screen (lines)
	
	reg [9:0] h_count;  // line position
	reg [9:0] v_count;  // screen position

	
	logic [31:0] 	LowerWordInstruction,
						MidWordInstruction,
						UpperWordInstruction;
	
	logic Ready,Valid,ReadInstruction;
	assign Ready = ~(PixelListLength==64);
	
	logic [95:0]	Instructions[0:15];
	logic [3:0]		InstructionCount;
	
	//Current State signals
	logic 	Active,		//Active when Output active pixels
			ReadTime,	//Active when fetching data from RAM
			WriteTime,	//Active when can write data to RAM
			PixelClock,	//VGA Controller Pixel Clock
			WriteDataAvailable;	//Active when there are data to be written to RAM
	
	// Pixel x and y
	logic [9:0] x;
	logic [8:0] y;
	
	logic old_DataWrite;
	
	always_ff @ (posedge Clock)
	begin
		old_DataWrite<=DataWrite;
	end
	
	logic [42:0] PixelInstructions[0:63];
	logic [42:0] NewPixelInstruction;
	logic [5:0] PixelListLength;
	logic WritePixel,RGBWriteSeq;
	
	
	logic [7:0] RedOut,			//Current Red Output
					GreenOut,	//Current Green Output
					BlueOut,	//Current Blue Output
					RedNext,
					GreenNext;

	
	logic [19:0] 	ReadAddress,
					WriteAddress;
						
	logic [15:0]	WriteData;
	
	assign PxClock=PixelClock;
	
	// ReadAddress from RAM for pixel x,y (leading 0 for Red and Green, 1 for Blue)
	assign ReadAddress[19] = ~PixelClock;
	assign ReadAddress[18:10] = y;
	assign ReadAddress[9:0] = x;
	
	// Write function not implemented yet
	assign WriteDataAvailable = ~(PixelListLength==0) ;
	assign WriteAddress = {RGBWriteSeq,PixelInstructions[0][42:34],PixelInstructions[0][33:24]};
	assign WriteData = RGBWriteSeq ? PixelInstructions[0][23:8] : {PixelInstructions[0][7:0],8'b00000000};
	
	// Output RGA color to VGA controller
	assign red=RedOut;
	assign green=GreenOut;
	assign blue=BlueOut;
	
   // generate sync signals (active low for 640x480)
   assign hsync = ~((h_count >= HS_STA) & (h_count < HS_END));
   assign vsync = ~((v_count >= VS_STA) & (v_count < VS_END));
	assign Sync=1;
	
   // keep x and y bound within the active pixels
   assign x = (h_count < HA_STA) ? 0 : (h_count - HA_STA);
   assign y = (v_count >= VA_END) ? (VA_END - 1) : (v_count);
	
	// blanking: high within the blanking period
   assign Blank = ~((h_count < HA_STA) | (v_count > VA_END - 1));

   // active: high during active pixel drawing
   assign Active = ~((h_count < HA_STA) | (v_count > VA_END - 1));
	
	assign ReadTime = (h_count > HA_STA - 1) & (v_count < VA_END -1);
	assign WriteTime = ~ReadTime & WriteDataAvailable;
	
	assign RAMData = 	ReadTime ? 	{16{1'bz}} :
						WriteTime ?  WriteData :
						{16{1'bz}} ;
	
	GPU_Core Core0(
		.Clock(Clock),
		.Reset(Reset),
		.Instruction(Instructions[0]),
		.ReadInstruction(ReadInstruction),
		.InstructionValid(Valid),
		.PixelInstruction(NewPixelInstruction),
		.WriteInstruction(WritePixel),
		.Ready(Ready)
		);
	
	always_ff @(posedge Clock)
	begin
		if(Reset)
		begin
			InstructionCount<=0;
		end
		else
		if(BusAddress==LowerWordInstructionAddress && DataWrite && ~old_DataWrite)
		begin
			LowerWordInstruction<=BusData;
		end
		else
		if(BusAddress==MidWordInstructionAddress && DataWrite && ~old_DataWrite)
		begin
			MidWordInstruction<=BusData;
		end
		else
		if(BusAddress==UpperWordInstructionAddress && DataWrite && ~old_DataWrite)
		begin
			UpperWordInstruction<=BusData;
			if(~(InstructionCount==16))
			begin
				if(~(ReadInstruction && ~(InstructionCount==0)))
				begin
					Instructions[InstructionCount]<={LowerWordInstruction,MidWordInstruction,UpperWordInstruction};
					InstructionCount<=InstructionCount+1;
				end
				else
				begin
					Instructions[0:14]<=Instructions[1:15];
					Instructions[InstructionCount-1]<={LowerWordInstruction,MidWordInstruction,UpperWordInstruction};
				end
			end
		end
		else
		if(ReadInstruction && ~(InstructionCount==0))
		begin
			Instructions[0:14]<=Instructions[1:15];
			InstructionCount<=InstructionCount-1;
		end
	end
	
	always_ff @ (posedge Clock)
	begin
		if(Reset)
		begin
			PixelListLength<=0;
		end
		if(WriteTime && RGBWriteSeq)
		begin
			if(WritePixel)
			begin
				PixelInstructions[0:62]<=PixelInstructions[1:63];
				PixelInstructions[PixelListLength-1]<=NewPixelInstruction;
			end
			else
			begin
				PixelListLength<=PixelListLength-1;
				PixelInstructions[0:62]<=PixelInstructions[1:63];
			end
		end
		else
		begin
			if(WritePixel && ~(PixelListLength==64))
			begin
				PixelInstructions[0:62]<=PixelInstructions[1:63];
				PixelInstructions[PixelListLength]<=NewPixelInstruction;
				PixelListLength<=PixelListLength+1;
			end
		end
	end
	
	
	always_ff @ (posedge Clock)
	begin
		if(Reset)
		begin
			RGBWriteSeq<=0;
		end
		else
		begin
			if(WriteTime)
			begin
				RGBWriteSeq<=~RGBWriteSeq;
			end
		end
	end
	
	always_comb
	begin
		//RAM signals
		RAMCE = 0;
		RAMLB = 0;
		RAMHB = 0;
		if(ReadTime)
		begin
			RAMOE = 0;
			RAMAddress = ReadAddress;
			RAMWE = 1;
		end
		else
		if(WriteTime)
		begin
			RAMOE = 1;
			RAMAddress = WriteAddress;
			RAMWE = Clock;					//Prepare Data when clock is high write data on transition 1 -> 0 move on on transition 0 -> 1
		end
		else
		begin
			RAMOE = 1;
			RAMAddress = 0;
			RAMWE = 1;
		end
	end
	
	always_ff @ (negedge Clock)
	begin
		if(Reset)
		begin
			RedOut<=0;
			GreenOut<=0;
			BlueOut<=0;
			RedNext<=0;
			GreenNext<=0;
		end
		if(ReadTime)	//If it's reading phase
		begin
			if(PixelClock)	//Reading Red, Green and Blue
			begin
				RedNext<=RAMData[15:8];
				GreenNext<=RAMData[7:0];
			end
			else
			begin
				RedOut<=RedNext;
				GreenOut<=GreenNext;
				BlueOut<=RAMData[15:8];
			end
		end
	end
	
	always_ff @ (posedge Clock)
	begin
		if(Reset)
		begin
			PixelClock<=0;
		end
		else
		begin
			PixelClock<=~PixelClock;
		end
	end

	always_ff @ (posedge Clock)
   begin
		if (Reset)  // reset to start of frame
		begin
			h_count <= 0;
			v_count <= 0;
		end
		else
		begin
			if (~PixelClock)  // once per pixel
			begin
				if (h_count == LINE)  // end of line
				begin
					h_count <= 0;
					v_count <= v_count + 1;
				end
				else
				begin
					h_count <= h_count + 1;

					if (v_count == SCREEN)  // end of screen
						v_count <= 0;
				end
			end
		end
	end
endmodule